129 lines
3.1 KiB
C
129 lines
3.1 KiB
C
/* Auto-generated config file peripheral_clk_config.h */
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#ifndef PERIPHERAL_CLK_CONFIG_H
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#define PERIPHERAL_CLK_CONFIG_H
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// <<< Use Configuration Wizard in Context Menu >>>
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// <y> ADC Clock Source
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// <id> adc_gclk_selection
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// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
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// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
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// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
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// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
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// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
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// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
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// <i> Select the clock source for ADC.
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#ifndef CONF_GCLK_ADC_SRC
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#define CONF_GCLK_ADC_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
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#endif
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/**
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* \def CONF_GCLK_ADC_FREQUENCY
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* \brief ADC's Clock frequency
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*/
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#ifndef CONF_GCLK_ADC_FREQUENCY
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#define CONF_GCLK_ADC_FREQUENCY 1000000
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#endif
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// <y> EIC Clock Source
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// <id> eic_gclk_selection
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// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
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// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
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// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
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// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
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// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
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// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
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// <i> Select the clock source for EIC.
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#ifndef CONF_GCLK_EIC_SRC
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#define CONF_GCLK_EIC_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
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#endif
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/**
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* \def CONF_GCLK_EIC_FREQUENCY
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* \brief EIC's Clock frequency
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*/
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#ifndef CONF_GCLK_EIC_FREQUENCY
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#define CONF_GCLK_EIC_FREQUENCY 1000000
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#endif
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/**
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* \def CONF_CPU_FREQUENCY
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* \brief CPU's Clock frequency
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*/
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#ifndef CONF_CPU_FREQUENCY
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#define CONF_CPU_FREQUENCY 1000000
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#endif
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// <y> RTC Clock Source
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// <id> rtc_clk_selection
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// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
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// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
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// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
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// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
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// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
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// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
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// <i> Select the clock source for RTC.
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#ifndef CONF_GCLK_RTC_SRC
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#define CONF_GCLK_RTC_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
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#endif
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/**
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* \def CONF_GCLK_RTC_FREQUENCY
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* \brief RTC's Clock frequency
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*/
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#ifndef CONF_GCLK_RTC_FREQUENCY
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#define CONF_GCLK_RTC_FREQUENCY 1000000
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#endif
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// <y> WDT Clock Source
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// <id> wdt_gclk_selection
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// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
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// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
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// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
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// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
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// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
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// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
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// <i> Select the clock source for WDT.
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#ifndef CONF_GCLK_WDT_SRC
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#define CONF_GCLK_WDT_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
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#endif
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/**
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* \def CONF_GCLK_WDT_FREQUENCY
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* \brief WDT's Clock frequency
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*/
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#ifndef CONF_GCLK_WDT_FREQUENCY
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#define CONF_GCLK_WDT_FREQUENCY 1000000
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#endif
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// <<< end of configuration section >>>
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#endif // PERIPHERAL_CLK_CONFIG_H
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