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fix hinting bug in spiller
We have to first free the output register of an instruction before setting the interference hints for inregs temporaries.
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@ -478,9 +478,6 @@ spill(Fn *fn)
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i->arg[n] = slot(t);
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}
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}
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r = v.t[0] & (BIT(Tmp0)-1);
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if (r)
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sethint(&v, r);
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reloads(&u, &v);
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if (!req(i->to, R)) {
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t = i->to.val;
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@ -488,6 +485,9 @@ spill(Fn *fn)
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BCLR(v, t);
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}
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emiti(*i);
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r = v.t[0] & (BIT(Tmp0)-1);
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if (r)
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sethint(&v, r);
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}
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assert(!r || b==fn->start);
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