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nits
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parent
fee64f4341
commit
5ac78c67c9
34
amd64/emit.c
34
amd64/emit.c
@ -196,9 +196,7 @@ emitcon(Con *con, E *e)
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l = str(con->sym.id);
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l = str(con->sym.id);
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p = l[0] == '"' ? "" : T.assym;
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p = l[0] == '"' ? "" : T.assym;
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if (con->sym.type & SThr) {
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if (con->sym.type & SThr) {
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if (T.apple)
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assert(!T.apple);
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fprintf(e->f, "%s%s@TLVP", p, l);
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else
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fprintf(e->f, "%%fs:%s%s@tpoff", p, l);
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fprintf(e->f, "%%fs:%s%s@tpoff", p, l);
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} else
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} else
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fprintf(e->f, "%s%s", p, l);
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fprintf(e->f, "%s%s", p, l);
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@ -532,14 +530,14 @@ emitins(Ins i, E *e)
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emitf("mov%k %0, %=", &i, e);
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emitf("mov%k %0, %=", &i, e);
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break;
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break;
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case Oaddr:
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case Oaddr:
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if (!T.apple
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if (rtype(i.arg[0]) != RCon)
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&& rtype(i.arg[0]) == RCon
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goto Table;
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&& e->fn->con[i.arg[0].val].sym.type == SThr) {
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/* derive the symbol address from the TCB
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* address at offset 0 of %fs */
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assert(isreg(i.to));
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assert(isreg(i.to));
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con = &e->fn->con[i.arg[0].val];
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con = &e->fn->con[i.arg[0].val];
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sym = str(con->sym.id);
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sym = str(con->sym.id);
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if (!T.apple && con->sym.type == SThr) {
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/* derive the symbol address from the TCB
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* address at offset 0 of %fs */
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emitf("movq %%fs:0, %L=", &i, e);
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emitf("movq %%fs:0, %L=", &i, e);
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fprintf(e->f, "\tleaq %s%s@tpoff",
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fprintf(e->f, "\tleaq %s%s@tpoff",
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sym[0] == '"' ? "" : T.assym, sym);
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sym[0] == '"' ? "" : T.assym, sym);
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@ -551,14 +549,16 @@ emitins(Ins i, E *e)
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regtoa(i.to.val, SLong));
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regtoa(i.to.val, SLong));
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break;
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break;
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}
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}
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if (!T.apple
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if (T.apple && con->sym.type == SThr) {
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&& rtype(i.arg[0]) == RCon
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fprintf(e->f,
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&& e->fn->con[i.arg[0].val].sym.type == SExtThr) {
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"\tmovq %s%s@TLVP(%%rip), %%%s\n",
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sym[0] == '"' ? "" : T.assym, sym,
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regtoa(i.to.val, SLong));
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break;
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}
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if (!T.apple && con->sym.type == SExtThr) {
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/* initial-exec TLS: load offset from
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/* initial-exec TLS: load offset from
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* GOT, add to thread-base register */
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* GOT, add to thread-base register */
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assert(isreg(i.to));
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con = &e->fn->con[i.arg[0].val];
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sym = str(con->sym.id);
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assert(!con->bits.i);
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assert(!con->bits.i);
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emitf("movq %%fs:0, %L=", &i, e);
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emitf("movq %%fs:0, %L=", &i, e);
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fprintf(e->f,
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fprintf(e->f,
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@ -567,12 +567,8 @@ emitins(Ins i, E *e)
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regtoa(i.to.val, SLong));
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regtoa(i.to.val, SLong));
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break;
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break;
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}
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}
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if (rtype(i.arg[0]) == RCon
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if (con->sym.type == SExt) {
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&& e->fn->con[i.arg[0].val].sym.type == SExt) {
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/* load address from the GOT */
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/* load address from the GOT */
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assert(isreg(i.to));
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con = &e->fn->con[i.arg[0].val];
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sym = str(con->sym.id);
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assert(!con->bits.i);
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assert(!con->bits.i);
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fprintf(e->f,
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fprintf(e->f,
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"\tmovq %s%s@gotpcrel(%%rip), %%%s\n",
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"\tmovq %s%s@gotpcrel(%%rip), %%%s\n",
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@ -143,9 +143,6 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
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cc = *c;
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cc = *c;
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cc.bits.i = 0;
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cc.bits.i = 0;
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r3 = newcon(&cc, fn);
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r3 = newcon(&cc, fn);
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if (T.apple && (c->sym.type & SThr))
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emit(Oload, Kl, r2, r3, R);
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else
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emit(Oaddr, Kl, r2, r3, R);
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emit(Oaddr, Kl, r2, r3, R);
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if (rtype(r0) == RMem) {
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if (rtype(r0) == RMem) {
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m = &fn->mem[r0.val];
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m = &fn->mem[r0.val];
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