From 6abea36b9b3e9eedf0b69a71769ec80f2b074b68 Mon Sep 17 00:00:00 2001 From: Quentin Carbonneaux Date: Tue, 28 Apr 2026 16:48:43 +0200 Subject: [PATCH] nits --- amd64/emit.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/amd64/emit.c b/amd64/emit.c index b48c31e..c7503de 100644 --- a/amd64/emit.c +++ b/amd64/emit.c @@ -380,7 +380,7 @@ Next: off = e->fn->con[ref.val]; emitcon(&off, e); if (off.type == CAddr) - if (off.sym.type != SThr || T.apple) + if (off.sym.type != SThr) fprintf(e->f, "(%%rip)"); break; case RTmp: @@ -537,6 +537,13 @@ emitins(Ins i, E *e) assert(isreg(i.to)); con = &e->fn->con[i.arg[0].val]; sym = str(con->sym.id); + if (T.apple && (con->sym.type & SThr)) { + fprintf(e->f, + "\tmovq %s%s@TLVP(%%rip), %%%s\n", + sym[0] == '"' ? "" : T.assym, sym, + regtoa(i.to.val, SLong)); + break; + } if (!T.apple && con->sym.type == SThr) { /* derive the symbol address from the TCB * address at offset 0 of %fs */ @@ -551,13 +558,6 @@ emitins(Ins i, E *e) regtoa(i.to.val, SLong)); break; } - if (T.apple && (con->sym.type & SThr)) { - fprintf(e->f, - "\tmovq %s%s@TLVP(%%rip), %%%s\n", - sym[0] == '"' ? "" : T.assym, sym, - regtoa(i.to.val, SLong)); - break; - } if (!T.apple && con->sym.type == SExtThr) { /* initial-exec TLS: load offset from * GOT, add to thread-base register */