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arm64: fix extern with offset
We need to add the offset after loading from the GOT. This is a fix for the issue reported in [0], and removes the offsets in isel to avoid the problem with large offsets in the naive patch. This is similar to what is done on amd64. Tested with cproc bootstrap using extern on aarch64. [0] https://lists.sr.ht/~mpu/qbe/%3Cd71fac06-1208-4e4f-85a4-e5edc7fd979c@app.fastmail.com%3E#%3C2F4DUTRJ9GA5V.3VK2QXK848F7U@mforney.org%3E
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@ -292,12 +292,13 @@ loadaddr(Con *c, char *rn, E *e)
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"\tadd\tR, R, #:tprel_lo12_nc:SO\n";
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break;
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case SExt:
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assert(c->bits.i == 0);
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if (T.apple)
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s = "\tadrp\tR, S@gotpageO\n"
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"\tldr\tR, [R, S@gotpageoffO]\n";
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s = "\tadrp\tR, S@gotpage\n"
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"\tldr\tR, [R, S@gotpageoff]\n";
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else
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s = "\tadrp\tR, :got:SO\n"
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"\tldr\tR, [R, #:got_lo12:SO]\n";
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s = "\tadrp\tR, :got:S\n"
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"\tldr\tR, [R, #:got_lo12:S]\n";
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break;
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}
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10
arm64/isel.c
10
arm64/isel.c
@ -78,9 +78,8 @@ fixarg(Ref *pr, int k, int phi, Fn *fn)
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switch (rtype(r0)) {
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case RCon:
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c = &fn->con[r0.val];
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if (T.apple
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&& c->type == CAddr
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&& (c->sym.type & SThr)) {
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if (c->type == CAddr && ((c->sym.type & SExt)
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|| (T.apple && (c->sym.type & SThr)))) {
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r1 = newtmp("isel", Kl, fn);
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*pr = r1;
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if (c->bits.i) {
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@ -91,16 +90,19 @@ fixarg(Ref *pr, int k, int phi, Fn *fn)
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emit(Oadd, Kl, r1, r2, r3);
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r1 = r2;
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}
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if (T.apple && (c->sym.type & SThr)) {
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emit(Ocopy, Kl, r1, TMP(R0), R);
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r1 = newtmp("isel", Kl, fn);
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r2 = newtmp("isel", Kl, fn);
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emit(Ocall, 0, R, r1, CALL(33));
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emit(Ocopy, Kl, TMP(R0), r2, R);
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emit(Oload, Kl, r1, r2, R);
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r1 = r2;
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}
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cc = *c;
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cc.bits.i = 0;
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r3 = newcon(&cc, fn);
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emit(Ocopy, Kl, r2, r3, R);
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emit(Ocopy, Kl, r1, r3, R);
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break;
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}
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if (KBASE(k) == 0 && phi)
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