mirror of
git://c9x.me/qbe.git
synced 2026-05-26 15:34:41 +00:00
mcf review
This commit is contained in:
parent
7ab2fbe07c
commit
fee64f4341
28
amd64/emit.c
28
amd64/emit.c
@ -551,19 +551,6 @@ emitins(Ins i, E *e)
|
|||||||
regtoa(i.to.val, SLong));
|
regtoa(i.to.val, SLong));
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (rtype(i.arg[0]) == RCon
|
|
||||||
&& e->fn->con[i.arg[0].val].sym.type == SExt) {
|
|
||||||
/* load address from the GOT */
|
|
||||||
assert(isreg(i.to));
|
|
||||||
con = &e->fn->con[i.arg[0].val];
|
|
||||||
sym = str(con->sym.id);
|
|
||||||
assert(!con->bits.i);
|
|
||||||
fprintf(e->f,
|
|
||||||
"\tmovq %s%s@GOTPCREL(%%rip), %%%s\n",
|
|
||||||
sym[0] == '"' ? "" : T.assym, sym,
|
|
||||||
regtoa(i.to.val, SLong));
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
if (!T.apple
|
if (!T.apple
|
||||||
&& rtype(i.arg[0]) == RCon
|
&& rtype(i.arg[0]) == RCon
|
||||||
&& e->fn->con[i.arg[0].val].sym.type == SExtThr) {
|
&& e->fn->con[i.arg[0].val].sym.type == SExtThr) {
|
||||||
@ -580,6 +567,19 @@ emitins(Ins i, E *e)
|
|||||||
regtoa(i.to.val, SLong));
|
regtoa(i.to.val, SLong));
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
if (rtype(i.arg[0]) == RCon
|
||||||
|
&& e->fn->con[i.arg[0].val].sym.type == SExt) {
|
||||||
|
/* load address from the GOT */
|
||||||
|
assert(isreg(i.to));
|
||||||
|
con = &e->fn->con[i.arg[0].val];
|
||||||
|
sym = str(con->sym.id);
|
||||||
|
assert(!con->bits.i);
|
||||||
|
fprintf(e->f,
|
||||||
|
"\tmovq %s%s@gotpcrel(%%rip), %%%s\n",
|
||||||
|
sym[0] == '"' ? "" : T.assym, sym,
|
||||||
|
regtoa(i.to.val, SLong));
|
||||||
|
break;
|
||||||
|
}
|
||||||
goto Table;
|
goto Table;
|
||||||
case Ocall:
|
case Ocall:
|
||||||
/* calls simply have a weird syntax in AT&T
|
/* calls simply have a weird syntax in AT&T
|
||||||
@ -592,7 +592,7 @@ emitins(Ins i, E *e)
|
|||||||
if (con->type == CAddr
|
if (con->type == CAddr
|
||||||
&& (con->sym.type & SExt)
|
&& (con->sym.type & SExt)
|
||||||
&& !T.apple)
|
&& !T.apple)
|
||||||
fprintf(e->f, "@PLT");
|
fprintf(e->f, "@plt");
|
||||||
fprintf(e->f, "\n");
|
fprintf(e->f, "\n");
|
||||||
break;
|
break;
|
||||||
case RTmp:
|
case RTmp:
|
||||||
|
|||||||
51
amd64/isel.c
51
amd64/isel.c
@ -121,11 +121,8 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
|
|||||||
emit(Oaddr, Kl, r1, SLOT(s), R);
|
emit(Oaddr, Kl, r1, SLOT(s), R);
|
||||||
}
|
}
|
||||||
else if (op != Ocall && hascon(r0, &c, fn)
|
else if (op != Ocall && hascon(r0, &c, fn)
|
||||||
&& c->type == CAddr && (c->sym.type & SExt)
|
&& c->type == CAddr && ((c->sym.type & SExt)
|
||||||
&& (!T.apple || c->sym.type == SExt)) {
|
|| (T.apple && c->sym.type == SThr))) {
|
||||||
/* extern symbols need indirection
|
|
||||||
* through the GOT
|
|
||||||
*/
|
|
||||||
r1 = newtmp("isel", Kl, fn);
|
r1 = newtmp("isel", Kl, fn);
|
||||||
if (c->bits.i) {
|
if (c->bits.i) {
|
||||||
r2 = newtmp("isel", Kl, fn);
|
r2 = newtmp("isel", Kl, fn);
|
||||||
@ -135,38 +132,21 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
|
|||||||
emit(Oadd, Kl, r1, r2, r3);
|
emit(Oadd, Kl, r1, r2, r3);
|
||||||
} else
|
} else
|
||||||
r2 = r1;
|
r2 = r1;
|
||||||
cc = *c;
|
if (T.apple && (c->sym.type & SThr)) {
|
||||||
cc.bits.i = 0;
|
emit(Ocopy, Kl, r2, TMP(RAX), R);
|
||||||
r3 = newcon(&cc, fn);
|
r2 = newtmp("isel", Kl, fn);
|
||||||
emit(Oaddr, Kl, r2, r3, R);
|
r3 = newtmp("isel", Kl, fn);
|
||||||
if (rtype(r0) == RMem) {
|
emit(Ocall, 0, R, r3, CALL(17));
|
||||||
m = &fn->mem[r0.val];
|
emit(Ocopy, Kl, TMP(RDI), r2, R);
|
||||||
m->offset.type = CUndef;
|
emit(Oload, Kl, r3, r2, R);
|
||||||
m->base = r1;
|
|
||||||
r1 = r0;
|
|
||||||
}
|
}
|
||||||
}
|
|
||||||
else if (T.apple && hascon(r0, &c, fn)
|
|
||||||
&& c->type == CAddr && (c->sym.type & SThr)) {
|
|
||||||
r1 = newtmp("isel", Kl, fn);
|
|
||||||
if (c->bits.i) {
|
|
||||||
r2 = newtmp("isel", Kl, fn);
|
|
||||||
cc = (Con){.type = CBits};
|
|
||||||
cc.bits.i = c->bits.i;
|
|
||||||
r3 = newcon(&cc, fn);
|
|
||||||
emit(Oadd, Kl, r1, r2, r3);
|
|
||||||
} else
|
|
||||||
r2 = r1;
|
|
||||||
emit(Ocopy, Kl, r2, TMP(RAX), R);
|
|
||||||
r2 = newtmp("isel", Kl, fn);
|
|
||||||
r3 = newtmp("isel", Kl, fn);
|
|
||||||
emit(Ocall, 0, R, r3, CALL(17));
|
|
||||||
emit(Ocopy, Kl, TMP(RDI), r2, R);
|
|
||||||
emit(Oload, Kl, r3, r2, R);
|
|
||||||
cc = *c;
|
cc = *c;
|
||||||
cc.bits.i = 0;
|
cc.bits.i = 0;
|
||||||
r3 = newcon(&cc, fn);
|
r3 = newcon(&cc, fn);
|
||||||
emit(Oload, Kl, r2, r3, R);
|
if (T.apple && (c->sym.type & SThr))
|
||||||
|
emit(Oload, Kl, r2, r3, R);
|
||||||
|
else
|
||||||
|
emit(Oaddr, Kl, r2, r3, R);
|
||||||
if (rtype(r0) == RMem) {
|
if (rtype(r0) == RMem) {
|
||||||
m = &fn->mem[r0.val];
|
m = &fn->mem[r0.val];
|
||||||
m->offset.type = CUndef;
|
m->offset.type = CUndef;
|
||||||
@ -177,9 +157,8 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
|
|||||||
else if (!(isstore(op) && r == &i->arg[1])
|
else if (!(isstore(op) && r == &i->arg[1])
|
||||||
&& !isload(op) && op != Ocall && rtype(r0) == RCon
|
&& !isload(op) && op != Ocall && rtype(r0) == RCon
|
||||||
&& fn->con[r0.val].type == CAddr) {
|
&& fn->con[r0.val].type == CAddr) {
|
||||||
/* apple as does not support 32-bit
|
/* turn address operands into
|
||||||
* absolute addressing, use a rip-
|
* lea/mov instructions
|
||||||
* relative leaq instead
|
|
||||||
*/
|
*/
|
||||||
r1 = newtmp("isel", Kl, fn);
|
r1 = newtmp("isel", Kl, fn);
|
||||||
emit(Oaddr, Kl, r1, r0, R);
|
emit(Oaddr, Kl, r1, r0, R);
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user