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mcf review
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7ab2fbe07c
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28
amd64/emit.c
28
amd64/emit.c
@ -551,19 +551,6 @@ emitins(Ins i, E *e)
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regtoa(i.to.val, SLong));
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break;
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}
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if (rtype(i.arg[0]) == RCon
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&& e->fn->con[i.arg[0].val].sym.type == SExt) {
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/* load address from the GOT */
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assert(isreg(i.to));
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con = &e->fn->con[i.arg[0].val];
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sym = str(con->sym.id);
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assert(!con->bits.i);
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fprintf(e->f,
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"\tmovq %s%s@GOTPCREL(%%rip), %%%s\n",
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sym[0] == '"' ? "" : T.assym, sym,
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regtoa(i.to.val, SLong));
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break;
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}
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if (!T.apple
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&& rtype(i.arg[0]) == RCon
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&& e->fn->con[i.arg[0].val].sym.type == SExtThr) {
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@ -580,6 +567,19 @@ emitins(Ins i, E *e)
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regtoa(i.to.val, SLong));
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break;
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}
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if (rtype(i.arg[0]) == RCon
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&& e->fn->con[i.arg[0].val].sym.type == SExt) {
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/* load address from the GOT */
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assert(isreg(i.to));
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con = &e->fn->con[i.arg[0].val];
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sym = str(con->sym.id);
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assert(!con->bits.i);
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fprintf(e->f,
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"\tmovq %s%s@gotpcrel(%%rip), %%%s\n",
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sym[0] == '"' ? "" : T.assym, sym,
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regtoa(i.to.val, SLong));
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break;
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}
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goto Table;
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case Ocall:
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/* calls simply have a weird syntax in AT&T
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@ -592,7 +592,7 @@ emitins(Ins i, E *e)
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if (con->type == CAddr
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&& (con->sym.type & SExt)
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&& !T.apple)
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fprintf(e->f, "@PLT");
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fprintf(e->f, "@plt");
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fprintf(e->f, "\n");
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break;
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case RTmp:
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51
amd64/isel.c
51
amd64/isel.c
@ -121,11 +121,8 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
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emit(Oaddr, Kl, r1, SLOT(s), R);
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}
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else if (op != Ocall && hascon(r0, &c, fn)
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&& c->type == CAddr && (c->sym.type & SExt)
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&& (!T.apple || c->sym.type == SExt)) {
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/* extern symbols need indirection
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* through the GOT
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*/
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&& c->type == CAddr && ((c->sym.type & SExt)
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|| (T.apple && c->sym.type == SThr))) {
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r1 = newtmp("isel", Kl, fn);
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if (c->bits.i) {
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r2 = newtmp("isel", Kl, fn);
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@ -135,38 +132,21 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
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emit(Oadd, Kl, r1, r2, r3);
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} else
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r2 = r1;
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cc = *c;
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cc.bits.i = 0;
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r3 = newcon(&cc, fn);
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emit(Oaddr, Kl, r2, r3, R);
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if (rtype(r0) == RMem) {
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m = &fn->mem[r0.val];
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m->offset.type = CUndef;
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m->base = r1;
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r1 = r0;
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if (T.apple && (c->sym.type & SThr)) {
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emit(Ocopy, Kl, r2, TMP(RAX), R);
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r2 = newtmp("isel", Kl, fn);
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r3 = newtmp("isel", Kl, fn);
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emit(Ocall, 0, R, r3, CALL(17));
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emit(Ocopy, Kl, TMP(RDI), r2, R);
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emit(Oload, Kl, r3, r2, R);
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}
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}
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else if (T.apple && hascon(r0, &c, fn)
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&& c->type == CAddr && (c->sym.type & SThr)) {
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r1 = newtmp("isel", Kl, fn);
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if (c->bits.i) {
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r2 = newtmp("isel", Kl, fn);
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cc = (Con){.type = CBits};
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cc.bits.i = c->bits.i;
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r3 = newcon(&cc, fn);
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emit(Oadd, Kl, r1, r2, r3);
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} else
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r2 = r1;
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emit(Ocopy, Kl, r2, TMP(RAX), R);
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r2 = newtmp("isel", Kl, fn);
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r3 = newtmp("isel", Kl, fn);
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emit(Ocall, 0, R, r3, CALL(17));
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emit(Ocopy, Kl, TMP(RDI), r2, R);
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emit(Oload, Kl, r3, r2, R);
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cc = *c;
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cc.bits.i = 0;
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r3 = newcon(&cc, fn);
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emit(Oload, Kl, r2, r3, R);
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if (T.apple && (c->sym.type & SThr))
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emit(Oload, Kl, r2, r3, R);
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else
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emit(Oaddr, Kl, r2, r3, R);
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if (rtype(r0) == RMem) {
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m = &fn->mem[r0.val];
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m->offset.type = CUndef;
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@ -177,9 +157,8 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
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else if (!(isstore(op) && r == &i->arg[1])
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&& !isload(op) && op != Ocall && rtype(r0) == RCon
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&& fn->con[r0.val].type == CAddr) {
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/* apple as does not support 32-bit
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* absolute addressing, use a rip-
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* relative leaq instead
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/* turn address operands into
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* lea/mov instructions
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*/
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r1 = newtmp("isel", Kl, fn);
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emit(Oaddr, Kl, r1, r0, R);
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