Commit Graph

299 Commits

Author SHA1 Message Date
Quentin Carbonneaux
6f09869ea1 move spill and emit to the new slot system
In emit, I worked a little to make sure that framesz works
when we change the size of the svec array (if we need more
alignments).
2015-09-15 23:01:32 -04:00
Quentin Carbonneaux
627e45e330 store the edit tag 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
17cba8793e add comment about variadic functions in abi 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
f8cd43adc4 clarify the abi 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
ff63704790 start summing up the abi 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
0f879b9b02 tweak block-border heuristic for reg. allocation
We only allocate a register that has a hint if the
hint register is not used already.  In the max example
it gives a better result and it does not seem to affect
the collatz test.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
a767351bdd remove obsolete comment 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
40d0582ee0 add sign/zero extension operations 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
5668e93147 refine the clobber code
It could very well be that the temporary we
assign already got assigned to the right
register!  Good things happen.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
c62b175442 fix two heuristics in rega
There was a typo that made always the same successor
to be selected for register allocation hinting.
Also, I now attempt to prioritize hints over succeccor's
choices as it appears to give slightly better results...

Now that I think about it, the code re-using the most
frequent successor block's assignment might be dead
because all registers have hints if they got assigned
once.  To investigate.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
0d5b5cefcb swap a test in collatz
This is pretty stupid...  Since we rely on rpo only
for code output (and not a proper scheduler), I have
to be careful with the ordering of tests to get
cleaner code.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
c334258427 compactify collatz test 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
6dc9646f5e remove obsolete comment about MEM
It turned out to be not so useful to have a MEM
type for references.  Instead I used an OAddr
instruction that translates simply to a lea.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
7bbd361083 add the mul instruction 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
27f4eae43e remove round-robin in ralloc (need preferences) 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
e1725c0cdd make sure tests emitted are encodable 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
ca8c320dec replace RMem refs with an OAddr opertation 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
16fe5c1366 compile branches on and using test 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
ca3dc70ff3 add a large test 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
2b34ec6d24 forgot about phi nodes in the spiller
When we are dealing with a block that is not
a loop, we must make sure to consider phi arguments
of successors as live variables.  Ideally we could
move the code to find all live-ins (including phi
arguments) to the live module.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
bccfc34ca3 make sure eflags-writing do not disappear
This is a hack implementation, ideally I would like
something cleaner.  The problem is that regalloc thinks
an instruction is dead code because it's not aware that
it writes to eflags.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
abbe53285f clobber check code was wrong in dopm() 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
4699fb7663 fix bug in parallel moves code 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
670604e91f handle OAnd in isel 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
ae5fe31482 change strategy for phi nodes 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
730bce080c avoid depending on uninitialized r 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
67d3c2834d tentative support for fast allocs
It seems that the MEM reference type is
meaningless in too many positions.
Because of this, it is unclear if we
should keep it or just introduce a
OAddr instruction that only accepts
slots.

Regardless of the above, the spilling
module needs to use the new slot_()
function, also, the emit function needs
to fetch the size of the stack frame
from the slot[] array.

The naming is still very transitional,
here is a list of all bogus names I can
think of:

  - SLOT()
  - Tmp.spill
  - slot_
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
0f3846e261 hack a slot-packing function and its tests 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
5ca5b74d07 use the same bitset for regs and tmps in rega()
This is possible because we know that they are
represented by different integers.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
5fc8104e00 major lifting: get rid of RReg
I've been septic since I introduced it, this commit
proves that it costs more than it helps.  I've also fixed
a bad bug in rega() where I alloc'ed the wrong size for
internal arrays.  Enums now have names so I can use them
to cast in gdb to get the name corresponding to a constant.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
78bf28f56e add basic support for stack allocation 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
8be35bf2be minor size optimization for 0XSet 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
8020748fbf fix typos in selcmp and comment 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
b6e9041a67 comment about immutables 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
79c3d8968b fail on constant comparisons
In the future they will be eliminated by
constant propagation.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
7ce4d334e5 add a small size optimization to emit 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
d37db3970f support for large constants
It was not as simple as I thought.  All constants
used in 32b context get truncated to 32 bits.
All constants in 64b contexts can either remain
as immutables are have to be evicted in a register,
this choice is taken in noimm().  The case of the
comparison needs to be documented since the context
is not clearly 32 or 64 bits.

I am still unsure if this is fully correct.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
0edafe814f store gcd result in a 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
06d6cc78f0 use proper store suffix in max test 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
1583f4bd32 split store into store{w,l} 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
f6df9e55c5 prefix register macros 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
ec5042148e fix my sloppy understanding of x86 assembly! 2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
03785fbc9a use round-robin in ralloc
This gives a more uniform use of the registers.
2015-09-15 23:01:31 -04:00
Quentin Carbonneaux
44329afff5 add funny little max ssa test 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
29c5f508b9 cosmetics 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
89039dcac1 movsb is not movsbl without suffix... 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
88d9573b76 attempt factoring store emission code 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
e3b8ea4904 parse variants of store 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
a69fe2c6c5 ugly support for store/load 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
e234a7a188 parse operations with no result 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
e5c68a88ce simplify parsing 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
76bf96b268 add nmem to opdesc for use in the spiller
This new machine-independent mechanism might not be general
enough in the long term but, now, it provides a flexible way
to inform the spiller about the maximum number of arguments
of an instruction that can be spill locations.
2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
9966a181c1 add some load/store operations 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
a6bbd5c980 fix wrong instruction in emit 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
4b0a865fee forbid two memory operands for comparisons 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
1721fe4313 fix a bug in setloc
The way we detected if limit had spilled a variable
was incorrect.  This is because two consecutive calls
to limit could require a spill of the same variable.
Instead, we now use a return value from limit.

Note that this is still not so ideal.  Indeed, it works
properly only when limit spills one value only, if not,
we should return a bitset.  In the current use scheme
of limit, this invariant is true but ideally we would
like to call limit with *all arguments added at once*,
not one after the other.
2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
83131357f7 add very nice spilling stress test 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
dcf07ba55c minor change in rpo walking 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
75eb0c3224 simplify frequent pred detection in rega 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
23846dd534 factor some comparison emitting code 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
0c5b683658 add some more specific comments 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
9d6e499132 the only wrong use count is the one of r 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
e240ec3026 I forgot cmp as flag setting instruction! 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
e65a615c90 jez becomes jnz, complete cmp+jmp contraction 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
ad012e9d55 implement smarter compare+branch 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
7dc3e5dcf6 split cmp in two sizes 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
27f32f26b3 get rid of the iteration macro 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
2482f4dbbb fix two bugs in isel 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
e5983ba1a2 fix 2 bad bugs in rega and improve substraction
The substraction contrained the register allocator
to allocate a different register for the result and
the second operand, now, we use a neg trick to compile
it down.  The machinery that was setup is, regardless,
interesting and will have to be used for floating
point computations (division).

The first bug in rega made broke the explicited loop
invariant:  we were using register allocation unavailable
information from other blocks.  It's still unclear
how we got wrong results from that considering mappings
are all 0-initialized.

The second bug is a stupid one, one sizeof operator was
missing from a memcpy...
2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
7cb3e8587f use nreg only when != NReg 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
078522cf5d use a temporary for constant comparisons 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
dba612623f fix limit bug in spill
I think this was not a big issue because the register
allocator does not consume a register when it encounters
obviously dead code.
2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
d673d8fcd2 remove useless TODO for now 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
9c7b06d68f quick fix for comparisons with constants 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
246a48ba94 start work on comparisons
There are two things I overlooked so far.

1. Binary instructions like cmp that do not have a result
   in registers need the size suffix sometimes, for example
   when comparing a spill location with a constant.

2. The register allocator needs to be adapted to support the
   comparison instruction: it is not possible to compare two
   spill locations without using a register.
2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
1477dffe32 use cmp $0, it works with spill slots 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
df358ad6d2 use correct sizes during reg allocation 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
d586852552 print registers with numbers 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
6f2a7a245a adapt emit to new Ref setting 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
0c20fda622 use regs of the correct type in isel 2015-09-15 23:01:30 -04:00
Quentin Carbonneaux
9456200d91 use a new Ref type for registers
This might not be a good idea, the problem was that
many spurious registers would be added to the Bits
data-structures during compilation (and would
always remain 0).  However, doing the above
modification de-uniformizes the handling of temps
and regs, this makes the code longer and not
really nicer.  Also, additional Bits structures
are required to track the registers independently.

Overall this might be a bad idea to revert.
2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
93601b6d02 patch isel to use symbol types 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
033dce6e17 silence clang warning 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
53e6393295 avoid name conflicts in enums 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
8d2d674466 start change of representation for registers 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
cf307002d9 start work on word/long handling 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
dff7044a2c replace IA with X for x64 instructions 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
0d5fb419e3 avoid keyword clash by using cons for constants 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
a2a2231027 cosmetic modifications to parse.c 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
d8d17705c4 clean the commutativity + fix bug in emit
The commutativity information only makes sense for
arithmetic expressions.  To account for that, I introduced
a new tri-valued boolean type B3.  Memory operations, for
example, will receive an undefined commutativity trit.

The code emitter was buggy when rega emitted instructions
like 'rax = add 1, rax', this is now fixed using the
commutativity information (we rewrite it in 'rax = add
rax, 1').
2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
1a78659dfa cosmetics 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
390045cae1 compress parsref code a little 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
92be2fdd17 start improving constants support 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
837c46ca81 add TODO 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
33b0d919e8 add support for in-block reg. contraints 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
bd0a00e555 perform isel before code emission 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
d8e40a56ec emit some x86-sepcific instructions 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
5fe13b14e2 compile emit module 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
fd964388f7 add a code emitter for at&t syntax 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
5f14d7fd7c silence clang warning 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
854ecd4009 add crippled dce to the allocator 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
8899449c39 complete a crude register allocator 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
ee784dbfcd start work on parallel moves 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
33fe5637c5 initiate work on reg allocation 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
8aa8070248 simplify spiller
It seems that this logic of shuffling stuff around
between blocks should be handled by the register
allocator instead: it *will* have to shuffle
between registers, so we might as well mix some
spill locations in.
2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
b6633a13bc finish spiller, now needs testing! 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
48f90356e0 new euclidean division test 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
5bd9deac8d add more printing support 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
e3356b23d5 standardize error message 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
f938fccd2b factor some spilling logic 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
da652b93f3 comment and fix if(BSET(..)) bug 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
5ac9fbd8e4 new spill test 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
36da4b30cc test isel 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
df0836e475 isel logic was moved to spill 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
2981a267f4 add slot addressing and some more spilling 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
ea811ab7c2 add simple spill test 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
49130f9edd prepare for block processing 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
abdcbe845a this makefile fu was useless 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
ee961fb487 always preserve last build 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
eb1df2b81e refine assertion in cost computation 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
4f4d4cce6f rework spilling code for jump arguments 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
0d1595c770 refine precision of loop use sets 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
2a4fbbc6e0 move some debug output out of main 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
7202c7dedf simplify tests for hd 2015-09-15 23:01:29 -04:00
Quentin Carbonneaux
1891a810e8 nicer debug, bug fixed in loop detection 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
58c314eeaf cosmetics 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
b35a7d2acd alt.ssa was in buggy ssa form 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
890c0ada0e attempt to fix loop uses/pressure in spill 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
5ad565e299 improve output, add debug array 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
bb2541693e correct phi usage accounting 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
6e8e6d3368 show more spilling data 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
037c1bf141 simplifications 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
a6168e6ed5 attempt more correct loop marking 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
3538e769a7 add a live-through temporary to test alt 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
4f9a5df76b more testing code 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
7f8a6d025c test code for the spiller 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
595ad96a34 cosmetics 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
8165e327e0 start working with loops in spill.c 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
0f0ee0466e rework liveness to compute reg pressure 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
7be3711bb6 add pressure in left block of alt.ssa 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
18cdbc1e7d add fun example! 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
226bbb5b71 fix some instruction emitting code 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
73add5daae start work on spiller 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
32cb8d315a define curi as a global too 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
186e68a8d3 single bit bitfield needs to be unsigned 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
bba9cf47c9 fix small type issues 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
a244ca17f1 start simple work on isel 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
a280eb6597 export error functions 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
e5a7482b54 rename mod to rem 2015-09-15 23:01:28 -04:00
Quentin Carbonneaux
c16532b9b0 remove useless typedefs 2015-09-15 23:01:28 -04:00