Commit Graph

37 Commits

Author SHA1 Message Date
Roland Paterson-Jones
5c1eb24e2c If-conversion RFC 4 - x86 only (for now), use cmovXX
Replacement of tiny conditional jump graphlets with
conditional move instructions.

Currently enabled only for x86. Arm64 support using cselXX
will be essentially identical.

Adds (internal) frontend sel0/sel1 ops with flag-specific
backend xselXX following jnz implementation pattern.

Testing: standard QBE, cproc, harec, hare, roland
2026-01-13 18:11:30 +01:00
Quentin Carbonneaux
112cc1b824 rv64: handle slots in jnz 2026-01-13 17:09:41 +01:00
Quentin Carbonneaux
03da40271f rv64: fix invalid float immediates
Thanks to Luke Graham for reporting
and fixing this issue.
2026-01-05 22:19:53 +01:00
Quentin Carbonneaux
8d5b86ac4c fix fp constants on big endian hosts 2025-04-16 10:29:00 +02:00
Roland Paterson-Jones
0ce9966c23 Re-use (vgrow) b->ins vector in backend xxx_abi() fn's.
Removes last re-allocation of b->ins.
2025-03-14 09:47:05 +01:00
Roland Paterson-Jones
434cf5fdc4 idup(Ins **, Ins *, ulong) -> idup(Blk *, Ins *, ulong)
Always used this way and factors setting b->nins.
Makes b->ins vector contract more obvious.
2025-03-14 09:47:05 +01:00
Roland Paterson-Jones
ca928f6f8d Blk::ins is a vector
Scratching an itch - avoid unnecesary re-allocation in idup()
which is called often in the optimisation chain.

Blk::ins is reallocated in xxx_abi() - needs further fiddling.
2025-03-14 09:47:05 +01:00
Erica Z
c8220b638b replace asm keyword
when applying a custom set of CFLAGS under clang that does not include
-std=c99, asm is treated as a keyword and as such can not be used as an
identifier. this prevents the issue by renaming the offending variables.
2024-05-28 10:39:41 +02:00
Quentin Carbonneaux
b24af7d3f7 revert 1b7770e271
Quotes are used on Apple target
variants to flag that we must
not add the _ symbol prefix.
2024-04-22 14:01:50 +02:00
Michael Forney
1b7770e271 Drop quotes around floating point constant labels
This is incompatible with binutils gas older than 2.26.
2024-03-26 09:22:06 +01:00
Drew DeVault
85287081c4 dbgloc: add column argument
dbgloc line [col]

This is implemented in a backwards-compatible manner.
2024-01-02 12:12:05 +01:00
Quentin Carbonneaux
36946a5142 file,loc become dbgfile,dbgloc 2023-08-18 15:12:56 +02:00
Thomas Bracht Laumann Jespersen
0d929287d7 implement line number info tracking
Support "file" and "loc" directives. "file" takes a string (a file name)
assigns it a number, sets the current file to that number and records
the string for later. "loc" takes a single number and outputs location
information with a reference to the current file.
2023-06-06 18:44:51 +02:00
Alexey Yerin
7410f90629 Emit .type and .size directives on RISC-V and ARM
To match x86
2023-03-11 21:56:45 +01:00
Quentin Carbonneaux
26c1c30b7d new blit instruction 2022-12-14 23:18:26 +01:00
Quentin Carbonneaux
c0f25aeae3 new rsval() helper for signed Refs
The .val field is signed in RSlot.
Add a new dedicated function to
fetch it as a signed int.
2022-12-12 22:16:33 +01:00
Quentin Carbonneaux
9126afa2da new hlt block terminator
It is handy to express when
the end of a block cannot be
reached. If a hlt terminator
is executed, it traps the
program.

We don't go the llvm way and
specify execution semantics as
undefined behavior.
2022-11-27 21:48:21 +01:00
Quentin Carbonneaux
cbee74bdb4 use a new struct for symbols
Symbols are a useful abstraction
that occurs in both Con and Alias.
In this patch they get their own
struct. This new struct packages
a symbol name and a type; the type
tells us where the symbol name
must be interpreted (currently, in
gobal memory or in thread-local
storage).

The refactor fixed a bug in
addcon(), proving the value of
packaging symbol names with their
type.
2022-11-22 21:56:21 +01:00
Quentin Carbonneaux
4e90b4210e "rel" fields become "reloc" 2022-10-08 21:48:47 +02:00
Quentin Carbonneaux
00a30954ac add support for thread-local storage
The apple targets are not done yet.
2022-10-08 21:48:42 +02:00
Quentin Carbonneaux
a9a70e30a8 add new target-specific abi0 pass
The general idea is to give abis a
chance to talk before we've done all
the optimizations. Currently, all
targets eliminate {par,arg,ret}{sb,ub,...}
during this pass. The forthcoming
arm64_apple will, however, insert
proper extensions during abi0.

Moving forward abis can, for example,
lower small-aggregates passing there
so that memory optimizations can
interact better with function calls.
2022-10-03 10:41:03 +02:00
Quentin Carbonneaux
0715a395df capitalize a label 2022-09-01 19:09:15 +02:00
Quentin Carbonneaux
8dddb971d9 drop -G flag and add target amd64_apple
apple support is more than assembly syntax
in case of arm64 machines, and apple syntax
is currently useless in all cases but amd64;
rather than having a -G option that only
makes sense with amd64, we add a new target
amd64_apple
2022-08-31 21:42:49 +02:00
Alexey Yerin
1162359a19 rv64: implement Oswap for floating-point types 2022-06-14 09:12:19 +02:00
Quentin Carbonneaux
bf2a90ef7c fix return for big aggregates
The recent changes in arm and riscv
typclass() set ngp to 1 when a struct
is returned via a caller-provided
buffer.  This interacts bogusly with
selret() that ends up declaring a gp
register live when none is set in
the returning sequence.

The fix is simply to set cty to zero
(all registers dead) in case a caller-
provided buffer is used.
2022-03-17 10:57:09 +01:00
Quentin Carbonneaux
2416d29141 new -t? flag to print default target 2022-03-15 22:30:34 +01:00
Quentin Carbonneaux
da36b211ab homogenize riscv and arm abis 2022-03-15 14:18:31 +01:00
Quentin Carbonneaux
c656c48f04 fix register count in riscv argregs 2022-03-15 14:18:23 +01:00
Quentin Carbonneaux
c5769f62b4 dynamic stack allocs for arm64
I also moved some isel logic
that would have been repeated
a third time in util.c.
2022-03-14 23:14:48 +01:00
Quentin Carbonneaux
7a7a5f4803 improve consistency in abis 2022-03-14 10:40:30 +01:00
Quentin Carbonneaux
a9e4fa9715 rv64: plug holes in the abi
Many things got fixed, but the most
notable change is the proper support
of floating point types in aggregates.

Minor fixes:
- selpar() did not deal correctly
  with Cfpint
- typclass() was reading out of
  bounds in the gp/fp arrays
- support for env calls
2022-03-10 22:52:20 +01:00
Quentin Carbonneaux
9060981c10 flag types defined as unions
The risc-v abi needs to know if a
type is defined as a union or not.

We cannot use nunion to obtain this
information because the risc-v abi
made the unfortunate decision of
treating

	union { int i; }

differently from

	int i;

So, instead, I introduce a single
bit flag 'isunion'.
2022-03-08 15:57:06 +01:00
Quentin Carbonneaux
349794f3e4 cosmetics 2022-03-08 15:36:26 +01:00
Quentin Carbonneaux
457e568ce9 rv64: formatting and bug fix in epilogue 2022-02-27 11:27:55 +01:00
Quentin Carbonneaux
c0cdef2e44 rv64: cosmetics in isel 2022-02-27 11:27:40 +01:00
Quentin Carbonneaux
42cbdc04d0 improve consistency in arm64 and rv64 abis 2022-02-25 10:49:55 +01:00
Michael Forney
4e93eeaa3b add rv64 backend
It is mostly complete, but still has a few ABI bugs when passing
floats in structs, or when structs are passed partly in register,
and partly on stack.
2022-02-17 22:43:12 +01:00