Commit Graph

9 Commits

Author SHA1 Message Date
Roland Paterson-Jones
5c1eb24e2c If-conversion RFC 4 - x86 only (for now), use cmovXX
Replacement of tiny conditional jump graphlets with
conditional move instructions.

Currently enabled only for x86. Arm64 support using cselXX
will be essentially identical.

Adds (internal) frontend sel0/sel1 ops with flag-specific
backend xselXX following jnz implementation pattern.

Testing: standard QBE, cproc, harec, hare, roland
2026-01-13 18:11:30 +01:00
Quentin Carbonneaux
86d13b93e8 arm64: use IP1 as scratch register
On Apple platforms x18 is not guaranteed
to be preserved across context switches.
So we now use IP1 as scratch register.

En passant, one dubious use of IP0 in
arm64/emit.c fixarg() was transitioned
to IP1. I believe the previous code could
clobber a user value if IP0 was live.
2025-03-15 14:27:34 +01:00
Quentin Carbonneaux
b03a8970d7 mark apple targets with a boolean
It is more natural to branch on a
flag than have different function
pointers for high-level passes.
2022-10-08 21:48:47 +02:00
Quentin Carbonneaux
79f3673d20 new arm64_apple target
Should make qbe work on apple
arm-based hardware.
2022-10-03 10:41:26 +02:00
Quentin Carbonneaux
a9a70e30a8 add new target-specific abi0 pass
The general idea is to give abis a
chance to talk before we've done all
the optimizations. Currently, all
targets eliminate {par,arg,ret}{sb,ub,...}
during this pass. The forthcoming
arm64_apple will, however, insert
proper extensions during abi0.

Moving forward abis can, for example,
lower small-aggregates passing there
so that memory optimizations can
interact better with function calls.
2022-10-03 10:41:03 +02:00
Quentin Carbonneaux
8dddb971d9 drop -G flag and add target amd64_apple
apple support is more than assembly syntax
in case of arm64 machines, and apple syntax
is currently useless in all cases but amd64;
rather than having a -G option that only
makes sense with amd64, we add a new target
amd64_apple
2022-08-31 21:42:49 +02:00
Quentin Carbonneaux
2416d29141 new -t? flag to print default target 2022-03-15 22:30:34 +01:00
Michael Forney
fd33b2ef25 arm64: Add LR to list of registers to save
Tested-by: Thomas Bracht Laumann Jespersen <t@laumann.xyz>
Fixes: https://todo.sr.ht/~sircmpwn/hare/312
2021-10-26 01:08:19 +02:00
Quentin Carbonneaux
61090c758d new arm64 backend, yeepee 2017-04-08 22:09:55 -04:00