Implementation comments for transpose with short height/width
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// Transpose and Reorder Axes (⍉)
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// Transpose
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// One length-2 axis: dedicated code
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// Boolean: pdep or emulation for height 2; pext for width 2
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// SHOULD use a generic implementation if BMI2 not present
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// SHOULD optimize other short lengths with pdep/pext and shuffles
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// Boolean 𝕩: convert to integer
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// pdep or emulation for height 2; pext for width 2
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// SHOULD switch to shuffles and modular permutation
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// SHOULD have bit matrix transpose kernel
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// CPU sizes: native or SIMD code
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// Large SIMD kernels used when they fit, overlapping for odd sizes
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// SSE, NEON i8: 8×8 ; i16: 8×8; i32: 4×4; f64: scalar
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// AVX i8: 16×16; i16: 16×8; i32: 8×8; f64: 4×4
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// COULD use half-width or smaller kernels to improve odd sizes
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// Scalar transpose or loop used for overhang of 1
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// AVX2 i8: 16×16; i16: 16×8; i32: 8×8; f64: 4×4
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// COULD use half-width or smaller kernels to improve odd sizes
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// Scalar transpose or loop used for overhang of 1
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// Partial kernels for at least half-kernel height/width
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// Short width: over-read, then skip some writes
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// Short height, i8 AVX2 only: overlap input rows and output words
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// Smaller heights and widths: dedicated kernels
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// Zipping, unzipping, shuffling for powers of 2
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// Modular permutation for odd numbers, possibly times 2
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// Reorder Axes
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// If 𝕨 indicates the identity permutation, return 𝕩
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