Strided +`, widening and re-trying on overflow
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@ -280,6 +280,23 @@ B scan_c1(Md1D* d, B x) { B f = d->f;
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si_scan_stride_minmax[4*(rtid==n_ceil) + xe-el_i8](xp, rp, ia, csz);
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decG(x); return r;
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}
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if (rtid==n_add) {
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if (xe==el_bit) { x = toI8Any(x); xe=el_i8; }
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restart:
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B r; void* rp = m_tyarrc(&r, elWidth(xe), x, el2t(xe));
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void* xp = tyany_ptr(x);
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bool done = si_scan_stride_add[xe-el_i8](xp, rp, ia, csz);
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if (!done) {
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decG(r);
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switch (++xe) {
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case el_i16: x = toI16Any(x); break;
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case el_i32: x = toI32Any(x); break;
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case el_f64: x = toF64Any(x); break;
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}
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goto restart;
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}
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decG(x); return r;
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}
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#endif
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goto base;
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}}
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@ -100,8 +100,11 @@ def shift_first{c:V=[l]_, p:V} = {
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# Strided scans
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fn scan_stride_assoc{op, T}(xv:*void, rv:*void, ia:usz, l:usz) : void = {
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def id = match (op) { {(min)} => maxvalue; {(max)} => minvalue }
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fn scan_stride_assoc{op, T, Ret, check_over}(xv:*void, rv:*void, ia:usz, l:usz) : Ret = {
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def id = match (op) {
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{(min)} => maxvalue; {(max)} => minvalue
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{(+)} => ({_}=>0)
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}
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def f = width{T}/8; def vl = 16/f
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x:= *T~~xv; r:= *T~~rv
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def has_shuf = hasarch{'SSSE3'} or hasarch{'AARCH64'}
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@ -112,8 +115,9 @@ fn scan_stride_assoc{op, T}(xv:*void, rv:*void, ia:usz, l:usz) : void = {
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spr:= I**16 - j + iv
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inds:= @collect (k) {
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v:= iv - (j &~ I~~(iv<j))
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j += j
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spr = shuf{spr, v}
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if (same{op, +}) v = iv - j
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j += j
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v
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}
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def V = [vl]T
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@ -121,6 +125,7 @@ fn scan_stride_assoc{op, T}(xv:*void, rv:*void, ia:usz, l:usz) : void = {
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@for_masked{vl} (x in tup{V, x}, r in tup{V, r} over ia) {
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def sc{v, i} = op{shuf{i8, v, i}, v}
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r = c = op{shuf{i8, c, spr}, fold{sc, x, inds}}
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check_over{x, r} # For +, infers other argument as r-x
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}
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}
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if (f==1 and l<4) small{3} else small{if (f<=2) 2 else 1}
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@ -131,6 +136,7 @@ fn scan_stride_assoc{op, T}(xv:*void, rv:*void, ia:usz, l:usz) : void = {
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r = p = op{p, x}
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}
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} else {
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def op_chk{p, x} = { r:= op{p, x}; check_over{p, x, r}; r }
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@for (r, x over l) r = x
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if (has_shuf and T<=i32 and l<256/f) {
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def I = [16]i8
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@ -145,24 +151,41 @@ fn scan_stride_assoc{op, T}(xv:*void, rv:*void, ia:usz, l:usz) : void = {
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p:= load{*V~~x}; store{*V~~r, 0, p}
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@for_masked{vl} (x in tup{V, x+o}, r in tup{V, r+o} over ia-o) {
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p = rot{p}
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r = op{bl{c, p}, x}
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r = op_chk{bl{c, p}, x}
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c = p; p = r
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}
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} else {
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@for_masked{vl} (x in tup{V, x+o}, r in tup{V, r+o}, p in tup{V, r} over ia-o) {
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q:= rot{p}
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r = op{bl{c, q}, x}
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r = op_chk{bl{c, q}, x}
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c = q
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}
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}
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} else if (same{op, +} and T<=i32 and has_simd) {
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def vl = arch_defvw/width{T}; def V = [vl]T
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@for_masked{vl} (x in tup{V, x+l}, r in tup{V, r+l}, p in tup{V, r} over ia-l) {
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r = op_chk{p, x}
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}
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} else {
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@for (r, x, p in r-l over _ from l to ia) r = op{p, x}
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}
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}
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1
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}
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def scan_stride_assoc{op, T} = scan_stride_assoc{op, T, void, {..._}=>{}}
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def check_add_over{w:V=[_]E, x:V, r:V} = {
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o:= (if (not hasarch{'X86_64'} or width{E}<=16) any_hom{subs{r,w} != x}
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else any_top{(w^r) & (x^r)})
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if (o) return{0}
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}
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def check_add_over{x, r} = check_add_over{r-x, x, r}
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export_tab{'si_scan_stride_minmax',
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flat_table{scan_stride_assoc, tup{min,max}, tup{i8,i16,i32,f64}}
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}
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export_tab{'si_scan_stride_add', tup{
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...each{scan_stride_assoc{+, ., u1, check_add_over}, tup{i8,i16,i32}},
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scan_stride_assoc{+, f64, u1, {..._}=>{}}
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}}
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# xor scan
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