move and_bit_none impl to x86.singeli; add andn_bit_none
This commit is contained in:
parent
1e53078324
commit
186acd6c8d
@ -16,8 +16,6 @@ def blend_top{f:T, t:T, m:M if w256i{T,32} and w256i{M,32}} = T ~~ blend_top{v2f
|
||||
def blend_top{f:T, t:T, m:M if w256i{T,64} and w256i{M,64}} = T ~~ blend_top{v2d{f}, v2d{t}, v2d{m}}
|
||||
|
||||
# mask stuff
|
||||
def and_bit_none{x:T, y:T if w256i{T}} = emit{u1, '_mm256_testz_si256', x, y}
|
||||
|
||||
def top_to_int{x:T if w256{T, 32}} = emit{u8, '_mm256_movemask_ps', v2f{x}}
|
||||
def top_to_int{x:T if w256{T, 64}} = emit{u8, '_mm256_movemask_pd', v2d{x}}
|
||||
def hom_to_int{x:T if w256{T}} = top_to_int{x}
|
||||
|
||||
@ -173,7 +173,7 @@ def lvec = match { {[n]T, n, (width{T})} => 1; {T, n, w} => 0 }
|
||||
|
||||
# base cases
|
||||
def {
|
||||
absu,and_bit_none,andnz,load_bits,blend,blend_units,clmul,cvt,extract,half,
|
||||
absu,and_bit_none,andn_bit_none,andnz,load_bits,blend,blend_units,clmul,cvt,extract,half,
|
||||
all_bit,any_bit,blend_bit,
|
||||
all_hom,any_hom,blend_hom,hom_to_int,store_masked_hom,store_blended_hom,
|
||||
all_top,any_top,blend_top,top_to_int,store_masked_top,store_blended_top,
|
||||
|
||||
@ -78,6 +78,5 @@ def narrow{(i8 ), x:X if hasarch{'SSE4.1'} and w128i{X,32}} = sel{[16]u8, [16]i8
|
||||
def narrow{(i16), x:X if hasarch{'SSE4.1'} and w128i{X,32}} = sel{[16]u8, [8]i16~~x, make{[16]i8, 0,1,4,5, 8,9,12,13, 0,0,0,0, 0,0,0,0}}
|
||||
|
||||
# mask stuff
|
||||
def and_bit_none{x:T, y:T if hasarch{'SSE4.1'} and w128i{T}} = emit{u1, '_mm_testz_si128', x, y}
|
||||
def blend_top{f:T, t:T, m:M if hasarch{'SSE4.1'} and w128i{T} and w128i{M,32}} = T ~~ blend_top{v2f{f}, v2f{t}, m}
|
||||
def blend_top{f:T, t:T, m:M if hasarch{'SSE4.1'} and w128i{T} and w128i{M,64}} = T ~~ blend_top{v2d{f}, v2d{t}, m}
|
||||
|
||||
@ -102,6 +102,9 @@ def any_bit{x:[_]_} = ~and_bit_none{x, x}
|
||||
|
||||
def mulh{a:V, b:V=[_]E if veci{V,16} and hase{V}} = emit{V, intrin_t{V, 'mulhi'}, a, b}
|
||||
|
||||
def and_bit_none{x:V, y:V if width{V}<=256 and veci{V} and hase{V, 'SSE4.1'}} = emit{u1, intrin{V, 'testz_', vec_l{V}}, x, y}
|
||||
def andn_bit_none{x:V, y:V if width{V}<=256 and veci{V} and hase{V, 'SSE4.1'}} = emit{u1, intrin{V, 'testc_', vec_l{V}}, y, x}
|
||||
|
||||
# multiplies that only read low 32 bits of arguments
|
||||
def mul32{a:V, b:V=[_](u64) if hase{V }} = emit{V, intrin_t{el_s{V}, 'mul'}, a, b}
|
||||
def mul32{a:V, b:V=[_](i64) if hase{V, 'SSE4.1'}} = emit{V, intrin_t{el_s{V}, 'mul'}, a, b}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user