Update where/compress implementation comments
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// In the notes 𝕨 might indicate 𝕩 for Indices too
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// Boolean 𝕨 (Where/Compress) general case based on result type width
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// COULD use AVX-512
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// Size 1: pext, or bit-at-a-time
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// Emulate pext if unavailable
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// COULD return boolean result from Where
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// Size 8, 16: pdep/pext, or branchless
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// SHOULD try vector lookup-shuffle if unavailable or old AMD
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// Size 8, 16, 32, 64: mostly table-based
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// Where: direct table lookup, widening for 16 and 32 if available
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// Compress: table lookup plus shuffle
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// AVX2 permutevar8x32 for 32 and 64 if available
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// Sparse method using table-based Where fills in if no shuffle
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// SHOULD implement for NEON
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// AVX-512: compress instruction, separate store not compressstore
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// Size 32, 64: 16-bit indices from where_block_u16
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// Other sizes: always used grouped code
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// Adaptivity based on 𝕨 statistics
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