From 34d4fd64338135e88d0f12b1e570290ebbc2fe9b Mon Sep 17 00:00:00 2001 From: dzaima Date: Sun, 20 Aug 2023 00:18:09 +0300 Subject: [PATCH] more explicit loadu/storeu --- src/singeli/src/base.singeli | 3 +++ src/singeli/src/bins.singeli | 4 +++- src/singeli/src/slash.singeli | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/singeli/src/base.singeli b/src/singeli/src/base.singeli index bf2bf7de..6ba188ec 100644 --- a/src/singeli/src/base.singeli +++ b/src/singeli/src/base.singeli @@ -29,9 +29,12 @@ def load{p:P & isptr{P}} = load{p, 0} # def store{p:P, v & isptr{P}} = store{p, 0, v} def loadu{p:T & isunsigned{eltype{T}}} = emit{eltype{T}, merge{'loadu_u',fmtnat{elwidth{T}}}, p} def storeu{p:T, v:eltype{T} & isunsigned{eltype{T}}} = emit{void, merge{'storeu_u',fmtnat{elwidth{T}}}, p, v} +def loadu{p:T & issigned{eltype{T}}} = loadu {*ty_u{eltype{T}} ~~ p} +def storeu{p:T, v:eltype{T} & issigned{eltype{T}}} = storeu{*ty_u{eltype{T}} ~~ p, ty_u{v}} def loadu{p:T & elwidth{T}==8} = load{p} def storeu{p:T, v:eltype{T} & elwidth{T}==8} = store{p, v} + def reinterpret{T, x:X & T==X} = x def exportN{f, ...ns} = each{export{.,f}, ns} def exportT{name, fs} = { v:*type{tupsel{0,fs}} = fs; export{name, v} } diff --git a/src/singeli/src/bins.singeli b/src/singeli/src/bins.singeli index 29bbd6b1..450a044b 100644 --- a/src/singeli/src/bins.singeli +++ b/src/singeli/src/bins.singeli @@ -295,7 +295,9 @@ def bin_search_vec{T, up, w:*T, wn, x:*T, xn, rp, maxwn & hasarch{'AVX2'}} = { rn := if (T==i8) r else if (T==i16) half{narrow{u8, r}, 0} else extract{re_el{i64, narrow{u8, r}}, 0} - store{*type{rn}~~(*i8~~rp+j), 0, rn} + rnp := *type{rn}~~(*i8~~rp+j) + if (isvec{type{rn}}) store{rnp, 0, rn} + else storeu{rnp, rn} } } } diff --git a/src/singeli/src/slash.singeli b/src/singeli/src/slash.singeli index b55b5e35..3fce06a5 100644 --- a/src/singeli/src/slash.singeli +++ b/src/singeli/src/slash.singeli @@ -184,7 +184,7 @@ fn slash{c==1, T & T<=i16 & shufb128{}}(wp:*u64, x:arg{c,T}, r:*T, l:u64, sum:u6 s := V~~make{[2]u64, ind,0} if (T==i16) { s+=s; s = V~~mzipLo{s, s+V**1} } res := sel{V, load{*V~~(x+8*i)}, s} - if (T==i8) store{*u64~~r, 0, extract{[2]u64~~res, 0}} + if (T==i8) storeu{*u64~~r, extract{[2]u64~~res, 0}} else store{*V~~r, 0, res} r+= pc }