Fast ⊣˝˘ for power-of-two widths, 4- and 8-byte elements
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@ -78,15 +78,27 @@ def select_rows_pow2{T, x0, r0, nv, k} = {
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def V = [arch_defvw / width{T}]T
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xv := *V~~x0
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@for (r in *V~~r0 over i to nv) {
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def {mask, unzip0} = if (hasarch{'AARCH64'}) {
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tup{{x}=>x, unzip{..., 0}}
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} else {
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m := make{V, - (iota{vcount{V}}%k == 0)} # Mask off high bits
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def D = el_m{V}; def uz{a, b} = packQ{D~~a, D~~b}
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tup{&{m, .}, uz}
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}
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xs := each{load{xv, .}, iota{k}}
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r = tree_fold{unzip0, each{mask, xs}}
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def unzip0 = if (not hasarch{'X86_64'}) {
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unzip{..., 0} # Sane instruction set
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} else {
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def w = width{T}
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if (w <= 16) {
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# Pack instructions
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m := make{V, - (iota{vcount{V}}%k == 0)}
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xs = each{&{m, .}, xs} # Mask off high bits
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def D = el_m{V}
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{a, b} => packQ{D~~a, D~~b}
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} else {
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# Two-vector shuffles
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# Could also be used for 1/2-byte with ending gap >= 4 bytes,
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# less instructions but it doesn't seem faster
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def c = 128/w
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def sh = shuf{[c]ty_f{w}, ., 2*iota{c} % c}
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{...ab} => sh{ab}
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}
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}
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r = tree_fold{unzip0, xs}
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if (width{V} > 128) { # Lane axis wasn't packed, need to shuffle to bottom
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def tr{E,a, r} = shuf{[1<<a]E, r, tr_iota{shiftright{a-1, iota{a}}}}
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def lc = k > 4
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@ -102,16 +114,19 @@ fn select_rows_byte(x0:*void, r0:*void, n:usz, l:usz, e:u8) : usz = {
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def vl = arch_defvw / 8
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def vh = vl / 2
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def thr = min{vl+2, 20}
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if ((not has_simd) or n < vl or l >= usz~~thr>>e) return{0}
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if ((not has_simd) or n < vl or l > usz~~thr>>e) return{0}
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if (has_simd and (l & (l-1)) == 0) {
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nv := n / vl
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def try_unzip{T, k} = if (k < thr and l == k) {
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select_rows_pow2{T, x0, r0, nv, k}
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goto{'ret'}
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}
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if (e==0) { @unroll (p from 1 to 5) try_unzip{i8 , 1<<p} }
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else if (e==1) { @unroll (p from 1 to 4) try_unzip{i16, 1<<p} }
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else return{0}
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# 10 loops: i8 2,4,8,16; i16 2,4,8; i32 2,4; i64 2
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@unroll (ek to 4) if (e == ek) {
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def T = ty_s{8<<ek}
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@unroll (p from 1 to 5-ek) try_unzip{T, 1<<p}
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}
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return{0}
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setlabel{'ret'}; return{(usz~~vl>>e) * nv}
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}
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def has_blend = hasarch{'SSE4.1'} or hasarch{'AARCH64'}
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