diff --git a/build/singeliSubmodule b/build/singeliSubmodule index b43f3999..431d414d 160000 --- a/build/singeliSubmodule +++ b/build/singeliSubmodule @@ -1 +1 @@ -Subproject commit b43f3999b0c5a40b43ceee258fbe6bb8245d06af +Subproject commit 431d414de39973909e07cd24e98c12b5ab76d66e diff --git a/src/singeli/src/avx2.singeli b/src/singeli/src/avx2.singeli index 8291b355..e569de6b 100644 --- a/src/singeli/src/avx2.singeli +++ b/src/singeli/src/avx2.singeli @@ -30,12 +30,8 @@ def topBlend{f:T, t:T, m:M if w256{T, 8} and w256i{M, 8}} = T ~~ emit{[32]i8, ' def homBlend{f:T, t:T, m:M if w256{T, 8} and w256i{M, 8}} = topBlend{f, t, m} def homBlend{f:T, t:T, m:M if w256{T, 16} and w256i{M,16}} = T ~~ topBlend{[32]i8~~f, [32]i8~~t, [32]i8~~m} -def shuf{L, x:T, n if lvec{L,4,32} and w256{T} and knum{n}} = T ~~ emit{[8]i32, '_mm256_shuffle_epi32', v2i{x}, n} -def shuf{L, x:T, n if lvec{L,4,64} and w256{T} and knum{n}} = T ~~ emit{[4]f64, '_mm256_permute4x64_pd', v2d{x}, n} -def shufHalves{x:T, y:T, n if w256{T} and knum{n}} = T ~~ emit{[4]i64, '_mm256_permute2x128_si256', v2i{x}, v2i{y}, n} - -def sel{L, x:T, i:I if w256{T} and lvec{L,8,32} and w256{I,32}} = T ~~ emit{[32]u8, '_mm256_permutevar8x32_epi32', v2i{x}, i} -def sel{L, x:T, i:I if w256{T} and lvec{L,16,8} and w256{I, 8}} = T ~~ emit{[32]u8, '_mm256_shuffle_epi8', v2i{x}, i} +def sel{L, x:T, i:I if w256{T} and lvec{L,8,32} and w256{I,32}} = vec_shuffle{L, x, i} +def sel{L, x:T, i:I if w256{T} and lvec{L,16,8} and w256{I, 8}} = vec_shuffle{L, x, i} # masked store; F variants may not be a single instruction def topMaskStore{p:*T, m:M, v:T if w256i{M, 32} and w256{T,elwidth{M}}} = emit{void, '_mm256_maskstore_epi32', *i32~~p, m, [8]i32~~v} @@ -57,7 +53,7 @@ def homAny{x:T if w256i{T}} = ~emit{u1, '_mm256_testz_si256', v2i{x}, v2i{x}} def homAll{x:T if w256i{T}} = homMask{[32]u8 ~~ x} == 0xffff_ffff def topAny{x:T if w256i{T}} = topMask{x} != 0 def topAll{x:T=[k]_ if w256i{T}} = topMask{x} == (1<> n) +# Copy half of a vector to the other half +def dup_half{vec,half} = vec_shuffle{[4]u64, vec, 2*half+tup{0,1,0,1}} + # Forward or backwards in-place max-scan # Assumes a whole number of vectors and minimum 0 include './scan_common' @@ -41,24 +44,24 @@ fn max_scan{T, up}(x:*T, len:u64) : void = { def getsel{...x} = assert{'shuffling not supported', show{...x}} if_inline (hasarch{'AVX2'}) { def getsel{h:H=[16]T if width{T}==8} = { - sel{H, pair{h,h}, .} + vec_shuffle{H, pair{h,h}, .} } def getsel{v:V=[vl==32]T if width{T}==8} = { def H = n_h{V} vtop := V**(vl/2) - hs := each{shuf{[4]u64, v, .}, tup{4b3232, 4b1010}} - {i} => homBlend{...each{sel{H,.,i}, hs}, V~~i homBlend{...each{vec_shuffle{H,.,i}, hs}, V~~i 16) ui1 = shuf{[4]u64, ui, 4b3232} - ui = shuf{[4]u64, ui, 4b1010} - if (nu > vl) ui2 = each{shuf{[4]u64, tv{1}, .}, tup{4b1010, 4b3232}} + if (nu > 16) ui1 = dup_half{ui, 1} + ui = dup_half{ui, 0} + if (nu > vl) ui2 = each{dup_half{tv{1}, .}, tup{0,1}} } # Popcount on 8-bit values def sums{n} = if (n==1) tup{0} else { def s=sums{n/2}; merge{s,s+1} } @@ -166,7 +169,7 @@ def bins_vectab_i8{up, w, wn, x, xn, rp, t0, t, done if hasarch{'AVX2'}} = { s{shr16{v,4}} + s{v} } # Bit table - def swap{v} = shuf{[4]u64, v, 4b1032} # For signedness + def swap{v} = vec_shuffle{[4]u64, v, 2,3,0,1} # For signedness def sel_b = getsel{swap{vb}} # Masks for filtering bit table def ms = if (up) 256-(1<<(1+iota{8})) else (1< 16) { b := V~~(re_el{u16, i0} << (7 - lb{vl/2})) @@ -227,7 +230,7 @@ def bin_search_vec{prim, T, w:*T, wn, x:*T, xn, rp, maxwn if hasarch{'AVX2'}} = if (ex>=1 and wn >= svl) { --gap # Allows subtracting < instead of adding <= def un = uninterleave - def tr_half{a, b} = each{shufHalves{a,b,.}, tup{16b20, 16b31}} + def tr_half{a, b} = each{vec_select{128,tup{a,b},.}, tup{tup{0,2}, tup{1,3}}} def un{{a,b}} = tr_half{un{a},un{b}} if (not lanes) select{wv,1} = load{wg, 1} wv = un{wv} diff --git a/src/singeli/src/bitalign.singeli b/src/singeli/src/bitalign.singeli index 05868646..c914353c 100644 --- a/src/singeli/src/bitalign.singeli +++ b/src/singeli/src/bitalign.singeli @@ -2,7 +2,7 @@ def xrange{s, e} = s + range{e-s} def __shl{(u64)}{a:T, b} = T~~(re_el{u64,a}<>b) -def shuf_imm = shuf +def shuf_imm = vec_shuffle def shuf_impl{rw, ...iw, data} = assert{0, 'shuffling failed', ...data{'info'}} def type0{vs} = type{select{vs,0}} @@ -56,7 +56,7 @@ local def perm_split{x:X, lanes, chunks} = { def si0 = join{each{index_of, u, gr}*b + lanes%b} def si = tern{join{lanes>=0}, si0, 0xff} # def si = join{each{{u,g,l} => l>=0) index_of{u,g}*b + lanes%b else 0xff, u, gr, lanes}} - sel{[16]u8, + vec_shuffle{[16]u8, new_shuf{re_el{ty_u{b*8},X}, x, join{each{shiftright{.,chunks**0}, u}}}, make{X, si} } @@ -70,18 +70,18 @@ local def perm_shufb{x, is} = { } # TODO accept narrower inputs def shuf_impl{256, 256, data if hasarch{'AVX2'} and not same{perm_shufb{...data{u8}},'!'}} = perm_shufb{...data{u8}} -def shuf_impl{256, 128, data if hasarch{'AVX2'} and data{'h',u8}} = { def {x,is} = data{u8}; sel{[16]u8, pair{x, x}, make{[32]i8, is}} } +def shuf_impl{256, 128, data if hasarch{'AVX2'} and data{'h',u8}} = { def {x,is} = data{u8}; vec_shuffle{[16]u8, pair{x, x}, is} } def shuf_impl{512, 512, data if hasarch{'AVX512F'} and data{'h','nz',u8}} = { def {x,is} = data{u8}; sel{[64]u8, x, make{[64]u8, is}} } -def shuf_impl{256, 256, data if hasarch{'AVX2'} and data{'h','nz',u32}} = { def {x,is} = data{'nz',u32}; sel{[8]u32, x, make{[8]u32, is}} } -def shuf_impl{256, 256, data if hasarch{'AVX2'} and data{'h','nz',u64}} = { def {x,is} = data{'nz',u64}; shuf_imm{[4]u64, x, base{4,is}} } +def shuf_impl{256, 256, data if hasarch{'AVX2'} and data{'h','nz',u32}} = { def {x,is} = data{'nz',u32}; vec_shuffle{[8]u32, x, is} } +def shuf_impl{256, 256, data if hasarch{'AVX2'} and data{'h','nz',u64}} = { def {x,is} = data{'nz',u64}; shuf_imm{[4]u64, x, is} } def in_chunks{c, is} = { def ls = split{c, is}; all{{l, s} => all{(l<0) | ((l>=s) & (l>3 + bit{4, idxs}}} + d:= vec_shuffle{[16]u8, c, make{[32]i8, idxs>>3 + bit{4, idxs}}} e:= make{[32]u8, 1<2) { assert{(bulk==4) & hasarch{'AVX'}} if (len > 1) { - if (len > 2) r = opsh64{op}{r, 4b2222} - r = opsh64{op}{r, 4b1111} + if (len > 2) r = opsh64{op}{r, 4**2} + r = opsh64{op}{r, 4**1} } } } else { diff --git a/src/singeli/src/lut.singeli b/src/singeli/src/lut.singeli index c9e2cbde..c6756d03 100644 --- a/src/singeli/src/lut.singeli +++ b/src/singeli/src/lut.singeli @@ -40,7 +40,7 @@ def unzip_load{E, n, TG if width{E}*n <= arch_defvw} = each{tup, unzip{TG{[n]E, def widen_tup{u32, is:([16]u8)} = tup{ # compiler will deduplicate all the repeated calls of this on the same is widen{[8]u32, is}, - widen{[8]u32, shuf{[4]u32, is, 4b3232}}, + widen{[8]u32, vec_shuffle{[2]u64, is, 1,1}}, } def blend_halves{mode, E, nt, ni} = tup{nt, ni, loader{{TG} => { @@ -86,9 +86,9 @@ def raw_widen_inds{[k]D, x:[k0]S if k0>=k} = { # : [k*sc]S def add = make{RV, range{k*sc} % sc} if (hasarch{'AARCH64'} and [k]D == [2]u64 and S==u8) { def x16 = undefPromote{[16]u8, x} - (RV~~sel{[16]u8, x16, make{[16]u8, range{16}>>3}}<<3) + add + (RV~~vec_shuffle{[16]u8, x16, range{16}>>3}<<3) + add } else if (hasarch{'AVX2'} and [k]D == [4]u64 and S==u32) { - (sel{[8]u32, undefPromote{[8]u32, x}, make{[8]u32, range{8}>>1}}<>1}< is | (top &~ tree_fold{&, each{{m, o} => if (bit{o,i}!=0) m else ~m, bits, bi}}), range{vn}} - tup{tree_fold{|, each{sel{[16]u8,.,.}, luts, isp}}} + tup{tree_fold{|, each{vec_shuffle{[16]u8,.,.}, luts, isp}}} } }}}} def lut_gen{mode, E==u8, nt, ni if hasarch{'AVX2'} and nt<=16 and ni<=32} = tup{16, 32, loader{{TG} => { lut:[32]u8 = [32]u8**TG{[16]u8, 0} - {is:([32]u8)} => tup{sel{[16]u8, lut, is}} + {is:([32]u8)} => tup{vec_shuffle{[16]u8, lut, is}} }}} def lut_gen{mode, E==u32, nt, ni if hasarch{'AVX2'} and nt<=32 and ni<=16} = blend_halves{mode, E, 32, 16} @@ -163,7 +163,7 @@ def lut_gen{mode, E==u32, nt, ni if hasarch{'AVX2'} and nt<=16 and ni<=16} = ble def lut_gen{mode, E==u32, nt, ni if hasarch{'AVX2'} and nt<=8 and ni<=16} = tup{8, 16, loader{{TG} => { def lut = TG{[8]u32, 0} - def me{'idxs', is:([16]u8)} = each{{wis} => tup{wis, sel{[8]u32, lut, wis}}, widen_tup{u32,is}} # TODO inline, or properly outline + def me{'idxs', is:([16]u8)} = each{{wis} => tup{wis, vec_shuffle{[8]u32, lut, wis}}, widen_tup{u32,is}} # TODO inline, or properly outline def me{is:([16]u8)} = each{{{_,v}}=>v, me{'idxs', is}} }}} @@ -191,8 +191,8 @@ def lut_gen{mode, E, nt, ni if hasarch{'AARCH64'} and mode=='c' and E>=u16} = 0 def lut_gen{mode, E, nt, ni if hasarch{'AARCH64'} and mode=='i' and E==u64 and nt>16} = 0 -def lut16{tab:([16]u8), idxs:([16]u8)} = sel{[16]u8, tab, idxs} -def lut16{tab:([16]u8), idxs:([32]u8) if hasarch{'X86_64'}} = sel{[16]u8, pair{tab, tab}, idxs} +def lut16{tab:([16]u8), idxs:([16]u8)} = vec_shuffle{[16]u8, tab, idxs} +def lut16{tab:([16]u8), idxs:([32]u8) if hasarch{'X86_64'}} = vec_shuffle{[16]u8, pair{tab, tab}, idxs} def shuf_u8bits{inds:*u8, ni} = 0 def shuf_u8bits{inds:*u8, ni if has_sel} = { @@ -215,4 +215,4 @@ def shuf_u8bits{inds:*u8, ni if has_sel} = { def hi = lut16{v1, x >> 4} lo | hi } -} \ No newline at end of file +} diff --git a/src/singeli/src/replicate.singeli b/src/singeli/src/replicate.singeli index 9cbca051..3f40ce0f 100644 --- a/src/singeli/src/replicate.singeli +++ b/src/singeli/src/replicate.singeli @@ -103,7 +103,7 @@ rcsh4_lkup:*i8 = shiftright{0, scan{+, fold{|, table{==, rcsh4_dom, iota{64}}}}} def read_shuf_vecs{l, ellw:(u64), shp:*V} = { # tuple of byte selectors in 1<>1 - def fs{v, s} = gen{sel{[16]i8, v, s}} - a := shuf{[4]u64, x, 4b1010}; each{fs{a,.}, slice{sh,0,h}} + def fs{v, s} = gen{vec_shuffle{[16]i8, v, s}} + a := vec_shuffle{u64, x, 0,1,0,1}; each{fs{a,.}, slice{sh,0,h}} if (l%2) fs{x, select{sh, h}} - b := shuf{[4]u64, x, 4b3232}; each{fs{b,.}, slice{sh,-h}} + b := vec_shuffle{u64, x, 2,3,2,3}; each{fs{b,.}, slice{sh,-h}} } def get_rep_iter{V, wv==2}{x, gen} = { - def s = shuf{[4]u64, x, 4b3120} + def s = vec_shuffle{u64, x, 0,2,1,3} each{{q}=>gen{V~~q}, mzip128{s, s}} } def get_rep_iter{V==[4]u64, wv} = { def step = 4 - def sh = each{base{4,.}, get_shufs{step, wv, wv}} - {x, gen} => each{{s}=>gen{shuf{V, x, s}}, sh} + def sh = get_shufs{step, wv, wv} + {x, gen} => each{{s}=>gen{vec_shuffle{V, x, s}}, sh} } def rep_const_shuffle{wv, xv:*V, rv:*V, n:(u64)} = rep_const_shuffle{wv, get_rep_iter{V, wv}, xv, rv, n} @@ -171,7 +171,7 @@ if_inline (hasarch{'AVX2'}) { } else { # has_bytesel_128 def rep_iter_from_sh{sh}{x, gen} = { - each{{s} => gen{sel{[16]u8, x, s}}, sh} + each{{s} => gen{vec_shuffle{[16]u8, x, s}}, sh} } def rep_const_shuffle{wv==2, xv0:*V=[_]T, rv0:*V, n:(u64)} = { @@ -191,9 +191,9 @@ fn rep_const_shuffle_partial4(wv:u64, ellw:u64, x:*i8, r:*i8, n:u64) : void = { def [step]_ = V # Bytes written def wvb = wv << ellw def hs = (h*step) / wvb # Actual step size in argument elements - def shufbase{i if hasarch{'AVX2'}} = shuf{[4]u64, load{*V~~(x+i)}, 4b1010} + def shufbase{i if hasarch{'AVX2'}} = vec_shuffle{u64, load{*V~~(x+i)}, 0,1,0,1} def shufbase{i if has_bytesel_128} = load{*V~~(x+i)} - def shufrun{a, s} = sel{[16]i8, a, s} # happens to be the same across AVX2 & NEON + def shufrun{a, s} = vec_shuffle{[16]i8, a, s} # happens to be the same across AVX2 & NEON i:u64 = 0 re := r + n*wvb - h*step @@ -442,18 +442,18 @@ def rep_const_bool_div8{wv, x, r, nw if has_simd} = { run8{{x} => z{z{z{x}}}} } } else { # any_sel - def selH = sel{[16]u8, ., .} + def selH = vec_shuffle{[16]u8, ., .} def makeTab{t} = selH{mkV{if (avx2) merge{t,t} else t}, .} def id{xv} = xv if (wv == 2) { - def init = if (avx2) shuf{[4]u64, ., 4b3120} else id + def init = if (avx2) vec_shuffle{u64, ., 0,2,1,3} else id # Expander for half byte def tabr = makeTab{tr_iota{2*iota{4}} * 2b11} m4 := V**0xf run24{*V~~x, init, {x} => tabr{x & m4}, 4} } else if (wv == 4) { # Unzip 32-bit elements (result lanes) across AVX2 lanes - def pre = if (avx2) sel{[8]u32, ., make{[8]u32,tr_iota{1,2,0}}} else id + def pre = if (avx2) vec_shuffle{[8]u32, ., make{[8]u32,tr_iota{1,2,0}}} else id def init{xv} = { u:=pre{xv}; zip128{u,u,0} } # Expander for two bits in either bottom or next-to-bottom position def tabr = makeTab{tr_iota{0,4,0,4} * 2b1111} @@ -467,17 +467,6 @@ def rep_const_bool_div8{wv, x, r, nw if has_simd} = { flush{} } -def sel_imm{V=[4]T, x, {...inds} if hasarch{'SSE2'} and (T==u32 or T==u64)} = { - assert{length{inds} == 4} - shuf{V, x, base{4, inds}} -} -def sel_imm{V=([16]u8), x:X, {...inds}} = { - def I = re_el{u8,X}; def [n]_ = I - def l = length{inds} - assert{l==16 or l==n} - sel{V, x, make{I, cycle{n, inds}}} -} - # Data for the permutation that sends bit i to k*i % width{T} def modperm_dat{T, k} = { def w = width{T} @@ -502,16 +491,11 @@ def modperm_shuf_step{x:V=[_]T, l, m if l%8==0} = { } # Reverse each pair of elements def swap_elts{x:V=[_]_, el_bytes} = { - def selx{n, wd} = { + if (any_sel or (hasarch{'SSE2'} and el_bytes >= 2)) { + def wd = min{el_bytes, 8} def l = el_bytes/wd - def i = iota{n} - def rev = i + (l - 2*(i&l)) - sel_imm{[n]ty_u{wd*8}, x, rev} - } - if (hasarch{'SSE2'} and el_bytes >= 4) { - selx{4, max{4, el_bytes/2}} - } else if (any_sel) { - selx{16, 1} + def i = iota{l} + vec_shuffle{ty_u{wd*8}, x, merge{i+l, i}} } else { def sh = el_bytes*8 xe := re_el{ty_u{2*sh}, V} ~~ x @@ -526,7 +510,7 @@ def extract_modperm_mask{full:W, lane, l} = { def n = (if (f) 256 else 128) / w # and number of elements def o = l / w # Extract [o,2*o) def i = o + iota{n}%o - sel_imm{[n]ty_u{w}, if (f) full else lane, i} + vec_shuffle{ty_u{w}, if (f) full else lane, i} } def proc_mod_dat{swap_data:W} = { def ww = width{W}; def avx2 = ww==256 @@ -534,7 +518,7 @@ def proc_mod_dat{swap_data:W} = { def lens = reverse{1 << slice{iota{lb{hi}}, lb{lo}}} fold{{x,s}=>s{x}, ., each{get_swap, lens}} } - swap_lane := if (avx2) shuf{W, swap_data, 4b1010} else swap_data + swap_lane := if (avx2) vec_shuffle{swap_data, 0,1,0,1} else swap_data # Transform width-w units with shifts only def get_shiftperm{data, w} = { dat := data @@ -551,20 +535,20 @@ def proc_mod_dat{swap_data:W} = { # Within-byte transformation def get_byteperm{} = { def V = re_el{u8, W} - def sw_bytes = sel{[16]u8, swap_lane, V**0} + def sw_bytes = vec_shuffle{u8, swap_lane, 16**0} m4 := W~~V**0xf t0 := fold{{v,a}=>modperm_shift_step{v,...a}, W~~make{V,iota{vcount{V}}%16}, tup{ tup{4, sw_bytes &~ m4}, tup{2, ({v} => v | v<<4){sw_bytes & W~~V**0xc}} }} t4 := (t0&m4)<<4 | (t0&~m4)>>4 - def selI{v,i} = sel{[16]u8, v, V~~i} + def selI{v,i} = vec_shuffle{[16]u8, v, V~~i} {xv} => selI{t0, xv & m4} | selI{t4, (xv>>4) & m4} } def {partwidth, partperm} = { def sh{w, d} = tup{w, get_shiftperm{d, w}} if (ww==64) sh{64, swap_data} - else if (not any_sel) sh{32, shuf{[4]u32, swap_data, 4b0000}} + else if (not any_sel) sh{32, vec_shuffle{u32, swap_data, 0,0,0,0}} else tup{8, get_byteperm{}} } # Fill in higher steps @@ -647,7 +631,7 @@ def rep_const_bool_odd_mask4{ def sub_carry{a, c} = match (M) { {[l](u64)} => { ca := if (hasarch{'SSE4.2'} or hasarch{'AARCH64'}) { def S = [l]i64; S~~c > S**0 } - else { def S = [2*l]i32; cm := S~~c; cm != shuf{S, cm, 4b2301} } + else { cm := [2*l]i32~~c; cm != vec_shuffle{cm, 1,0} } a + M~~ca } {_} => a - promote{u64, c != 0} @@ -656,9 +640,9 @@ def rep_const_bool_odd_mask4{ while (1) { x:M = get_modperm_x{} def vrot1 = ifvec{{x} => { - if (w256{M}) shuf{M, x, 4b2103} + if (w256{M}) vec_shuffle{x, 3,0,1,2} else if (any_sel) vshl{x, x, vcount{type{x}}-1} - else shuf{[4]u32, x, 4b1032} + else vec_shuffle{x, 1,0} }} xo := x<>(64-k)} # Write result word given starting bits @@ -712,23 +696,23 @@ def rep_const_bool_small_odd{W=[wl](u64), max_wv, wv, get_perm_x, output} = { def ix = 64*slice{iota{k},1} // k # bits that overhang within a word def ib = ix // ew # byte index def io = ew*ib + k*ix%ew # where they are in xv - def wi = split{wl, dup{tup{255, ...ib, 255, ...se+ib}}} + def wi = split{wl, dup{tup{-1, ...ib, -1, ...se+ib}}} xo := ov_bytes{(xv & W**fold{|, 1<> (ew-k)} # Permute and mask bytes def step{jj, oi, ind, mask} = { def hk = (k-1) / 2 def getv = if (not lanes or jj==hk) ({x}=>x) - else sel_imm{[4]u64, ., 2*(jj>hk) + iota{4}%2} - def selx{x, i} = sel_imm{[128/ew]ty_u{ew}, getv{x}, i} + else vec_shuffle{[4]u64, ., 2*(jj>hk) + iota{4}%2} + def selx{x, i} = vec_shuffle{[128/ew]ty_u{ew}, getv{x}, i} b := selx{xv, ind} & make{W, mask} r := (b<> make{[8]u32, 4*tail{1, iota{8}}} - s:= sel8{[32]u8~~b, ii32>>3 + bit{2}} + s:= vec_shuffle{16, [32]u8~~b, ii32>>3 + bit{2}} p:= s & make{[32]u8, (1<<(1+tail{2})) - 1} # Prefixes - d:= sel{[16]u8, make{[32]u8, merge{sums{4},sums{4}}}, [32]i8~~p} - d+= sel8{d, bit{2}*(1+bit{3}>>2)-1} - d + sel8{d, bit{3}-1} + d:= vec_shuffle{[16]u8, make{[32]u8, merge{sums{4},sums{4}}}, [32]i8~~p} + d+= vec_shuffle{16, d, bit{2}*(1+bit{3}>>2)-1} + d + vec_shuffle{16, d, bit{3}-1} } def step{x:(u32), i, store1} = { d:= sumlanes{x} - if (w==8) d+= [32]u8~~shuf{[4]u64, [8]i32~~sel8{d, bit{3}<<4-1}, 4b1100} + if (w==8) d+= [32]u8~~vec_shuffle{[4]u64, [8]i32~~sel8{d, bit{3}<<4-1}, 0,0,1,1} j:= (w/8)*i def out{v, k} = each{out, widen{v}, 2*k+iota{2}} def out{v0:([vl]T), k} = { @@ -341,7 +341,7 @@ def avx2_loop_with_unaligned_mask{xp, rp, nw, l, scan_words, apply_carry} = { @maskedLoop{4} (x in tup{V, xp}, r in tup{V, rp} over promote{u64,nw}) { s := scan_words{x, m} - pc:= c; c = shuf{V, -(s>>63), 4b2103} + pc:= c; c = vec_shuffle{-(s>>63), 3,0,1,2} r = apply_carry{s, blend{V, c, pc, 2b0001}, (m-V**1)&~m} m = m>>d4 | m<<(l-d4) } diff --git a/src/singeli/src/scan_common.singeli b/src/singeli/src/scan_common.singeli index fa73d6af..fa29e611 100644 --- a/src/singeli/src/scan_common.singeli +++ b/src/singeli/src/scan_common.singeli @@ -3,8 +3,6 @@ def sel8{v:V, t} = sel{[16]u8, v, make{re_el{i8,V}, t}} def sel8{v:V, t if w256{V} and istup{t} and length{t}==16} = sel8{v, merge{t,t}} -def shuf{T, v, n if istup{n}} = shuf{T, v, base{4,n}} - local def rev{t} = { def l=length{t}; def j=l-1; select{j-t, j-range{l}} } local def rev{up,t} = if (up) t else rev{t} def sel8{v, t, up} = sel8{v, rev{up,t}} @@ -22,13 +20,13 @@ def spread{a:[_]T, ...up} = { def toLast{n:VT, up if hasarch{'X86_64'} and w128{VT}} = { def l{v, w} = l{zip{up,v}, 2*w} def l{v, w if hasarch{'SSSE3'}} = sel8{v, up*(16-w/8)+iota{16}%(w/8)} - def l{v, w==32} = shuf{[4]i32, v, 4**(up*3)} - def l{v, w==64} = shuf{[4]i32, v, (2*up) + tup{0,1,0,1}} + def l{v, w==32} = vec_shuffle{[4]i32, v, 4**(up*3)} + def l{v, w==64} = vec_shuffle{[2]i64, v, 2** up } l{n, elwidth{VT}} } def toLast{n:VT, up if hasarch{'AVX2'} and w256{VT}} = { if (elwidth{VT}<=32) sel{[8]i32, spread{n,up}, [8]i32**(up*7)} - else shuf{[4]u64, n, 4**(up*3)} + else vec_shuffle{[4]u64, n, 4**(up*3)} } def toLast{n:VT} = toLast{n, 1} @@ -52,17 +50,17 @@ def make_scan_idem{T, op, up} = { (if (up) shl else shr){[16]u8, v, k/8} | id } def shb{v, k if hasarch{'SSSE3'}} = sel8{v, shift{k/8,16}} - def shb{v, k if k>=32} = shuf{[4]u32, v, shift{k/32,4}} + def shb{v, k if k>=32} = vec_shuffle{[4]u32, v, shift{k/32,4}} def shb{v, k if k==128 and hasarch{'AVX2'}} = { # After lanewise scan, broadcast end of lane 0 to entire lane 1 - sel{[8]i32, spread{v,up}, make{[8]i32, rev{up,3*(3>3} + def byte = vec_shuffle{[16]u8, xrev, cw>>3} r = homMask{ty_s{byte << (cw & VU**7)} < VI**0} } } else { if (wl>32 and xl<=16) { - xb:= shuf{[4]u64, spreadBits{[32]u8, load{*u32~~x0}}, 4b1010} + xb:= vec_shuffle{[4]u64, spreadBits{[32]u8, load{*u32~~x0}}, 0,1,0,1} @maskedLoop{32}(cw0 in w, sr in *u32~~r0, M in 'm' over wl) { cw:= wrapChk{cw0, xlf, M} - sr = homMask{sel{[16]i8, xb, cw}} + sr = homMask{vec_shuffle{[16]i8, xb, cw}} } } else { - x:= shuf{[4]u64, load{*VI ~~ x0}, 4b1010} + x:= vec_shuffle{[4]u64, load{*VI ~~ x0}, 0,1,0,1} low:= VI**7 b := VI~~make{[32]u8, 1 << (iota{32} & 7)} @maskedLoop{32}(cw0 in w, sr in *u32~~r0, M in 'm' over wl) { cw:= wrapChk{cw0, xlf, M} - byte:= sel{[16]i8, x, VI~~(([8]u32~~(cw&~low))>>3)} - mask:= sel{[16]i8, b, cw & low} + byte:= vec_shuffle{[16]i8, x, VI~~(([8]u32~~(cw&~low))>>3)} + mask:= vec_shuffle{[16]i8, b, cw & low} sr = homMask{(mask & byte) == mask} } } diff --git a/src/singeli/src/sse2.singeli b/src/singeli/src/sse2.singeli index c7ae639f..c4aa1a5e 100644 --- a/src/singeli/src/sse2.singeli +++ b/src/singeli/src/sse2.singeli @@ -33,10 +33,10 @@ def mulh{a:T,b:T if [8]u16==T} = emit{T, '_mm_mulhi_epu16', a, b} def mul32{a:T,b:T if [2]u64==T} = emit{T, '_mm_mul_epu32', a, b} # reads only low 32 bits of arguments def __mul{a:T,b:T if [4]i32==T} = { def mu{x, y} = [4]i32 ~~ mul32{[2]u64~~x, [2]u64~~y} - def sw{n, ...vs} = each{{c} => shuf{[4]i32, c, n}, vs} + def sw{n, ...vs} = each{{c} => vec_shuffle{i32, c, n}, vs} lo:= mu{a, b} - hi:= mu{...sw{4b2301, a, b}} - [4]i32~~mzip{...sw{4b3120, lo, hi}, 0} + hi:= mu{...sw{tup{1,0}, a, b}} + [4]i32~~mzip{...sw{tup{0,2,1,3}, lo, hi}, 0} } # float arith @@ -74,11 +74,8 @@ def x86_postfix{(f64)} = '_pd' def zip{a:T, b:T, 0 if w128{T}} = emit{T, merge{'_mm_unpacklo',x86_postfix{eltype{T}}}, a, b} def zip{a:T, b:T, 1 if w128{T}} = emit{T, merge{'_mm_unpackhi',x86_postfix{eltype{T}}}, a, b} -def shuf{L, x:T, n if w128{T} and lvec{L,4,32} and knum{n}} = T ~~ emit{[4]i32, '_mm_shuffle_epi32', v2i{x}, n} -def shuf16Lo{x:T, n} = T~~emit{[8]i16, '_mm_shufflelo_epi16', x, n} -def shuf16Hi{x:T, n} = T~~emit{[8]i16, '_mm_shufflehi_epi16', x, n} def x86_shufps_range{is, hi} = inrange{is,0,2, 0,4} and inrange{is,2,4, hi,hi+4} -def shufInd{a:T, b:T=[4]E, {...is} if width{E}==32 and length{is}==4 and x86_shufps_range{is, 4}} = T~~emit{[4]f32, '_mm_shuffle_ps', v2f{a}, v2f{b}, base{4, is&3}} +def shufInd{a:T, b:T=[4]E, {...is} if width{E}==32 and length{is}==4 and x86_shufps_range{is, 4}} = T~~vec_shuffle{[4]f32, tup{a, b}, is&3} def homBlend{f:T, t:T, m:M if w128{T} and w128i{M,elwidth{T}}} = T ~~ ((M~~t & m) | (M~~f &~ m)) def homMaskStoreF{p:*T, m:M, v:T if w128i{M} and w128{T,elwidth{M}}} = store{p, 0, homBlend{load{p}, v, m}} @@ -92,15 +89,17 @@ def widen{T==[2]f64, x:X if w128s{X} and elwidth{X}<32} = widen{T, widen{[4]i32, def widen{T==[2]f64, x:X==[4]i32} = emit{T, '_mm_cvtepi32_pd', x} def widen{T==[2]f64, x:X==[4]f32} = emit{T, '_mm_cvtps_pd', x} +local def nsh = tup{0,2,3,3} +local def nar = vec_shuffle{..., nsh} def narrow{T==i16, x:([4]i32)} = packs{x,x} def narrow{T==i8, x:([8]i16)} = packs{x,x} def narrow{T==u8, x:([8]u16)} = packs{x,x} -def narrow{T==u16, x:([4]u32)} = [8]u16~~shuf{[4]i32, shuf16Hi{shuf16Lo{x, 4b3320}, 4b3320}, 4b3320} +def narrow{T==u16, x:([4]u32)} = [8]u16~~nar{i32, nar{i16, x}} def narrow{T==i8, x:([4]i32)} = narrow{T, narrow{i16, x}} def narrow{T==u8, x:([4]u32)} = { def f{v} = narrow{u8, [8]u16~~v}; f{f{x}}} def narrow{T==u8, x:([2]u64)} = { def f{v} = narrow{u8, [8]u16~~v}; f{f{f{x}}}} -def narrow{T==u16, x:([2]u64)} = shuf16Lo{[8]u16~~shuf{[4]i32, x, 4b3320}, 4b3320} -def narrow{T==u32, x:([2]u64)} = [4]u32~~shuf{[4]i32, x, 4b3320} +def narrow{T==u16, x:([2]u64)} = vec_shuffle16_lo{[8]u16~~nar{i32, x}, nsh} +def narrow{T==u32, x:([2]u64)} = [4]u32~~nar{i32, x} def narrow{T, x:X if w128f{X,64} and Temit{[8]i32, '_mm256_permute2f128_si256', a,b,s}, ...p} - merge{h{16b20}, h{16b31}} + def h{...s} = each{vec_select{128, ., s}, flip{p}} + merge{h{0,2}, h{1,3}} } def unpack_to{f, l, x} = { def pass = if (f) permute_pass else unpack_pass pass{l, if (l==1) x else unpack_to{0, l/2, x}} } # Last pass for square kernel packed in halves -def shuf_pass{x} = each{{v} => shuf{[4]i64, v, 4b3120}, x} +def shuf_pass{x} = each{{v} => vec_shuffle{[4]i64, v, 0,2,1,3}, x} # Square kernel where width is a full vector def transpose_square{VT, l, x if hasarch{'AVX2'}} = unpack_to{1, l/2, x} diff --git a/src/singeli/src/vecfold.singeli b/src/singeli/src/vecfold.singeli index 0961a50f..ec6fbe85 100644 --- a/src/singeli/src/vecfold.singeli +++ b/src/singeli/src/vecfold.singeli @@ -3,9 +3,9 @@ def vfold{F, x:V=[_]T if w128{V} and hasarch{'X86_64'}} = { c:= x def EW = width{T} - if (EW<=64) c = F{c, shuf{[4]u32, c, 4b1032}} - if (EW<=32) c = F{c, shuf{[4]u32, c, 4b2301}} - if (EW<=16) c = F{c, shuf16Lo{c, 4b2301}} + if (EW<=64) c = F{c, vec_shuffle{u64, c, 1,0}} + if (EW<=32) c = F{c, vec_shuffle{u32, c, 1,0}} + if (EW<=16) c = F{c, vec_shuffle16_lo{c, tup{1,0,3,2}}} if (EW==8) { v:=extract{[8]i16~~c, 0}; F{cast_i{T, v}, cast_i{T, v>>8}} } else extract{c, 0} }