Missing SSSE3 requirement for some uninterleave implementations
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@ -220,7 +220,7 @@ fn interleave{T}(r0:*void, x0:*void, x1:*void, n:u64) : void = {
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}
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}
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}
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}
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# SIMD implementations
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# SIMD implementations
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def uninterleave{r0:*T, r1:*T, xp:*T, n if has_simd} = {
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def uninterleave{r0:*T, r1:*T, xp:*T, n if has_simd and (not hasarch{'X86_64'} or width{T}>=32 or hasarch{'SSSE3'})} = {
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def l = arch_defvw / width{T}
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def l = arch_defvw / width{T}
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def V = [l]T
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def V = [l]T
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rv0 := *V~~r0; rv1 := *V~~r1; xv := *V~~xp
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rv0 := *V~~r0; rv1 := *V~~r1; xv := *V~~xp
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