more consistent NEON naming
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e3b30e5db7
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@ -177,7 +177,7 @@ def {
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all_bit,any_bit,blend_bit,
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all_bit,any_bit,blend_bit,
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all_hom,any_hom,blend_hom,hom_to_int,homMaskStore,homMaskStoreF,
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all_hom,any_hom,blend_hom,hom_to_int,homMaskStore,homMaskStoreF,
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all_top,any_top,blend_top,top_to_int,topMaskStore,topMaskStoreF,
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all_top,any_top,blend_top,top_to_int,topMaskStore,topMaskStoreF,
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loadBatchBit,loadLow,make,maskStore,maskToHom,mulw,mulh,narrow,narrowTrunc,narrowPair,
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loadBatchBit,loadLow,make,maskStore,maskToHom,mulwSplit,mulh,narrow,narrowTrunc,narrowPair,
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packQ,pair,pdep,pext,popcRand,rbit,rev,sel,shl,shr,shufInd,storeLow,
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packQ,pair,pdep,pext,popcRand,rbit,rev,sel,shl,shr,shufInd,storeLow,
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unord,unzip,vfold,vec_select,vec_shuffle,widen,widenUpper,multishift,
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unord,unzip,vfold,vec_select,vec_shuffle,widen,widenUpper,multishift,
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}
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}
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@ -67,7 +67,7 @@ def arithChk2{F=(__mul), M, w:T=[_](i32), x:T if hasarch{'X86_64'}} = {
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}
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}
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def arithChk2{F=(__mul), M, w:T=[_]E, x:T if hasarch{'AARCH64'}} = {
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def arithChk2{F=(__mul), M, w:T=[_]E, x:T if hasarch{'AARCH64'}} = {
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def {rl, rh} = pack{...mulw{w, x}}
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def {rl, rh} = pack{...mulwSplit{w, x}}
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tup{rl, tup{'any_hom', M{rh != (rl >> (width{E}-1))}}}
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tup{rl, tup{'any_hom', M{rh != (rl >> (width{E}-1))}}}
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}
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}
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@ -20,11 +20,11 @@ def __gt{a:T, 0 if nvecs{T} or nvecf{T}} = emit{ty_u{T}, ntyp{'vcgtz', T}, a}
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def __ge{a:T, 0 if nvecs{T} or nvecf{T}} = emit{ty_u{T}, ntyp{'vcgez', T}, a}
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def __ge{a:T, 0 if nvecs{T} or nvecf{T}} = emit{ty_u{T}, ntyp{'vcgez', T}, a}
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def __eq{a:T, 0 if nveci{T} or nvecf{T}} = emit{ty_u{T}, ntyp{'vceqz', T}, a}
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def __eq{a:T, 0 if nveci{T} or nvecf{T}} = emit{ty_u{T}, ntyp{'vceqz', T}, a}
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def addwLo{a:T,b:T if w64i{T}} = emit{el_d{T}, ntyp{'vaddl', T}, a, b}
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def addw{a:T,b:T if w64i{T}} = emit{el_d{T}, ntyp{'vaddl', T}, a, b}
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def subwLo{a:T,b:T if w64i{T}} = emit{el_d{T}, ntyp{'vsubl', T}, a, b}
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def subw{a:T,b:T if w64i{T}} = emit{el_d{T}, ntyp{'vsubl', T}, a, b}
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def mulwLo{a:T,b:T if w64i{T}} = emit{el_d{T}, ntyp{'vmull', T}, a, b}
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def mulw{a:T,b:T if w64i{T}} = emit{el_d{T}, ntyp{'vmull', T}, a, b}
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def mulwHi{a:T,b:T if w128i{T}} = emit{el_m{T}, ntyp0{'vmull_high', T}, a, b}
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def mulwUpper{a:T,b:T if w128i{T}} = emit{el_m{T}, ntyp0{'vmull_high', T}, a, b}
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def mulw {a:T,b:T if w128{T}} = tup{mulwLo{half{a,0}, half{b,0}}, mulwHi{a,b}}
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def mulwSplit{a:T,b:T if w128{T}} = tup{mulw{half{a,0}, half{b,0}}, mulwUpper{a,b}}
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def shrn{a:T, s if w128i{T} and elwidth{T}>8} = { def H=el_h{T}; emit{H, ntyp0{'vshrn_n', T}, a, s} } # a>>s, narrowed
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def shrn{a:T, s if w128i{T} and elwidth{T}>8} = { def H=el_h{T}; emit{H, ntyp0{'vshrn_n', T}, a, s} } # a>>s, narrowed
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def shrm{a:T, s, d:T if nvecu{T}} = emit{T, ntyp{'vsri', '_n', T}, d, a, s} # (a>>s) | (d & (mask of new zeroes))
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def shrm{a:T, s, d:T if nvecu{T}} = emit{T, ntyp{'vsri', '_n', T}, d, a, s} # (a>>s) | (d & (mask of new zeroes))
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