use arch-independent names for things suppported on both x86-64 & NEON

This commit is contained in:
dzaima 2022-12-24 15:26:05 +02:00
parent d38316e670
commit 6d79ce9fb1
4 changed files with 13 additions and 13 deletions

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@ -16,7 +16,7 @@ FN_LUT_A(cmp_fns, ge, AS); FN_LUT_A(cmp_fns, ge, AA);
FN_LUT_A(cmp_fns, lt, AS);
FN_LUT_A(cmp_fns, le, AS);
#define ARCH(N) avx2_##N
#define ARCH(N) simd_##N
#define DSTE(N) &(cmp_fns_##N[0])
void cmpA_init() {
{

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@ -30,4 +30,4 @@ bitsel_i{VL,T}(r:*void, bits:*u64, e0:u64, e1:u64, len:u64) : void = {
def table{w} = each{{T} => bitsel_i{w, T}, tup{u8, u16, u32, u64}}
def tup_bitsel = table{arch_defvw}; v_bitsel:*type{tupsel{0,tup_bitsel}} = tup_bitsel; 'avx2_bitsel'=v_bitsel
def tup_bitsel = table{arch_defvw}; v_bitsel:*type{tupsel{0,tup_bitsel}} = tup_bitsel; 'simd_bitsel'=v_bitsel

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@ -135,14 +135,14 @@ def table{aa, F, w, G_bit, G_vec} = {
def tableAA{w, F, F_bit} = table{1, F, w, {} => bitAA{F_bit}, {V, u} => aa2bit{V, u, F}}
def tableAS{w, F } = table{0, F, w, {} => bitAS{F}, {V, u} => as2bit{V, u, F}}
def tup_eqAA = tableAA{arch_defvw, __eq, {a,b}=>a ^ ~b}; v_eqAA:*type{tupsel{0,tup_eqAA}} = tup_eqAA; 'avx2_eqAA'=v_eqAA
def tup_neAA = tableAA{arch_defvw, __ne, {a,b}=>a ^ b}; v_neAA:*type{tupsel{0,tup_neAA}} = tup_neAA; 'avx2_neAA'=v_neAA
def tup_gtAA = tableAA{arch_defvw, __gt, {a,b}=>a & ~b}; v_gtAA:*type{tupsel{0,tup_gtAA}} = tup_gtAA; 'avx2_gtAA'=v_gtAA
def tup_geAA = tableAA{arch_defvw, __ge, {a,b}=>a | ~b}; v_geAA:*type{tupsel{0,tup_geAA}} = tup_geAA; 'avx2_geAA'=v_geAA
def tup_eqAA = tableAA{arch_defvw, __eq, {a,b}=>a ^ ~b}; v_eqAA:*type{tupsel{0,tup_eqAA}} = tup_eqAA; 'simd_eqAA'=v_eqAA
def tup_neAA = tableAA{arch_defvw, __ne, {a,b}=>a ^ b}; v_neAA:*type{tupsel{0,tup_neAA}} = tup_neAA; 'simd_neAA'=v_neAA
def tup_gtAA = tableAA{arch_defvw, __gt, {a,b}=>a & ~b}; v_gtAA:*type{tupsel{0,tup_gtAA}} = tup_gtAA; 'simd_gtAA'=v_gtAA
def tup_geAA = tableAA{arch_defvw, __ge, {a,b}=>a | ~b}; v_geAA:*type{tupsel{0,tup_geAA}} = tup_geAA; 'simd_geAA'=v_geAA
def tup_eqAS = tableAS{arch_defvw, __eq}; v_eqAS:*type{tupsel{0,tup_eqAS}} = tup_eqAS; 'avx2_eqAS'=v_eqAS
def tup_neAS = tableAS{arch_defvw, __ne}; v_neAS:*type{tupsel{0,tup_neAS}} = tup_neAS; 'avx2_neAS'=v_neAS
def tup_gtAS = tableAS{arch_defvw, __gt}; v_gtAS:*type{tupsel{0,tup_gtAS}} = tup_gtAS; 'avx2_gtAS'=v_gtAS
def tup_geAS = tableAS{arch_defvw, __ge}; v_geAS:*type{tupsel{0,tup_geAS}} = tup_geAS; 'avx2_geAS'=v_geAS
def tup_ltAS = tableAS{arch_defvw, __lt}; v_ltAS:*type{tupsel{0,tup_ltAS}} = tup_ltAS; 'avx2_ltAS'=v_ltAS
def tup_leAS = tableAS{arch_defvw, __le}; v_leAS:*type{tupsel{0,tup_leAS}} = tup_leAS; 'avx2_leAS'=v_leAS
def tup_eqAS = tableAS{arch_defvw, __eq}; v_eqAS:*type{tupsel{0,tup_eqAS}} = tup_eqAS; 'simd_eqAS'=v_eqAS
def tup_neAS = tableAS{arch_defvw, __ne}; v_neAS:*type{tupsel{0,tup_neAS}} = tup_neAS; 'simd_neAS'=v_neAS
def tup_gtAS = tableAS{arch_defvw, __gt}; v_gtAS:*type{tupsel{0,tup_gtAS}} = tup_gtAS; 'simd_gtAS'=v_gtAS
def tup_geAS = tableAS{arch_defvw, __ge}; v_geAS:*type{tupsel{0,tup_geAS}} = tup_geAS; 'simd_geAS'=v_geAS
def tup_ltAS = tableAS{arch_defvw, __lt}; v_ltAS:*type{tupsel{0,tup_ltAS}} = tup_ltAS; 'simd_ltAS'=v_ltAS
def tup_leAS = tableAS{arch_defvw, __le}; v_leAS:*type{tupsel{0,tup_leAS}} = tup_leAS; 'simd_leAS'=v_leAS

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@ -4,7 +4,7 @@
#if SINGELI
#define SINGELI_FILE bits
#include "../utils/includeSingeli.h"
#define bitselFns avx2_bitsel
#define bitselFns simd_bitsel
#endif
NOINLINE Arr* allZeroes(usz ia) { u64* rp; Arr* r = m_bitarrp(&rp, ia); for (usz i = 0; i < BIT_N(ia); i++) rp[i] = 0; return r; }