NEON loadLow, storeLow, andIsZero, maskstore, pack
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@ -79,8 +79,10 @@ def to_el{E, x:T} = to_el{E,T} ~~ x
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# change width of primitive type
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def to_w{T, w} = primtype{quality{T}, w}
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# double (element) type width
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def ty_dbl{T & isprim{T}} = to_w{T, width{T}*2}
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def ty_dbl{T & isvec{T}} = to_el{ty_dbl{eltype{T}}, T}
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def ty_dbl {T & isprim{T}} = to_w{T, width{T}*2}
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def ty_half{T & isprim{T}} = to_w{T, width{T}/2}
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def ty_dbl {T & isvec{T}} = to_el{ty_dbl {eltype{T}}, T}
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def ty_half{T & isvec{T}} = to_el{ty_half{eltype{T}}, T}
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def unroll{vars,begin,end,block & knum{begin} & knum{end}} = {
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def f{i,l & i==l} = 0
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@ -67,6 +67,24 @@ def fold_addw{a:T & nvec{T}} = emit{ty_dbl{eltype{T}}, ntyp{'vaddlv', T}, a}
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def fold_min {a:T & nvec{T}} = emit{eltype{T}, ntyp{'vminv', T}, a}
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def fold_max {a:T & nvec{T}} = emit{eltype{T}, ntyp{'vmaxv', T}, a}
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def extract{x:T,n & nvec{T} & knum{n}} = emit{eltype{T}, ntyp{'vget', '_lane', T}, x, n}
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# TODO don't rely on regular stores being unaligned
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local def storeu{ptr:P, e:T} = store{ptr, 0, e}
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local def loadu{ptr:P} = load{ptr}
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def storeLow{ptr:P, w, x:T & nvec{T} & w<=64} = { def E=ty_u{w}; storeu{*E~~ptr, extract{to_el{E,T}~~x, 0}} }
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def storeLow{ptr:P, w, x:T & nvec{T} & w==width{T}} = store{*T~~ptr, 0, x}
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def loadLow{ptr:P, w & w<=64} = { # a broadcast load
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def T=eltype{P};
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def L=to_el{ty_u{w}, T};
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T ~~ emit{L, ntyp{'vld1', '_dup', L}, *ty_u{w}~~ptr}
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}
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def loadLow{ptr:P, w & w==elwidth{P}} = load{ptr}
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def bitAny{x:T} = fold_max{to_el{u32, x}}!=0
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def bitAll{x:T} = fold_min{to_el{u32, x}}==0xffff_ffff
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@ -75,6 +93,8 @@ def topAll{x:T & nvec{T}} = fold_max{ty_s{x}}<0
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def homAny{x:T & nvec{T}} = bitAny{x}
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def homAll{x:T & nvec{T}} = bitAll{x}
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def pack{x:T, y:T & nvec{T}} = { def H=ty_half{T}; emit{H, ntyp{'vuzp1', H}, H~~x, H~~y} }
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def broadcast{T, x & nvec{T}} = emit{T, ntyp{'vdup', '_n', T}, x}
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def make{T, ...xs & nvec{T} & tuplen{xs}==vcount{T}} = {
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@ -90,3 +110,7 @@ def getmask{x:T & nvecu{T} & elwidth{T}>=vcount{T}} = {
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def getmask{x:T & nvecu{T} & T==[16]u8} = {
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fold_add{addpw{x & make{[16]u8, 1<<(iota{16}&7)}} << make{[8]u16, merge{4**0, 4**8}}}
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}
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def andIsZero{x:T, y:T & nveci{T}} = ~bitAny{x&y}
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def maskstore{p:P, m:M, x:T & eltype{P}==T & nvec{T}} = store{p, 0, bblend{load{p}, x, m}}
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def maskstoreF{p:P, m:M, x:T & nvec{T}} = maskstore{p, m, x}
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