From bf04b3aab0f185a3ebd56034851acc313c73889e Mon Sep 17 00:00:00 2001 From: Marshall Lochbaum Date: Sun, 26 Mar 2023 20:33:24 -0400 Subject: [PATCH] Move w128i and similar from sse3 and avx.singeli to base --- src/singeli/src/avx.singeli | 9 --------- src/singeli/src/base.singeli | 37 +++++++++++++++++++++++++++--------- src/singeli/src/sse3.singeli | 9 --------- 3 files changed, 28 insertions(+), 27 deletions(-) diff --git a/src/singeli/src/avx.singeli b/src/singeli/src/avx.singeli index 4a580745..b5d874ac 100644 --- a/src/singeli/src/avx.singeli +++ b/src/singeli/src/avx.singeli @@ -1,12 +1,3 @@ -def w256{T} = 0 -def w256{T & isvec{T}} = width{T}==256 -def w256{T,w} = 0 -def w256{T,w & w256{T}} = elwidth{T}==w -def w256i = genchk{w256, {T} => isint{T}} -def w256s = genchk{w256, {T} => issigned{T}} -def w256u = genchk{w256, {T} => isunsigned{T}} -def w256f = genchk{w256, {T} => isfloat{T}} - def v2i{x:T & w256{T}} = [32]u8 ~~ x # for compact casting for the annoying intrinsic type system def v2f{x:T & w256{T}} = [8]f32 ~~ x def v2d{x:T & w256{T}} = [4]f64 ~~ x diff --git a/src/singeli/src/base.singeli b/src/singeli/src/base.singeli index 2eb6e795..4bd83f18 100644 --- a/src/singeli/src/base.singeli +++ b/src/singeli/src/base.singeli @@ -11,15 +11,6 @@ def exportT{name, fs} = { v:*type{tupsel{0,fs}} = fs; export{name, v} } def elwidth{T} = width{eltype{T}} -def genchk{B, F} = { - def r{T} = 0 - def r{T & B{T}} = F{eltype{T}} - def r{T,w} = 0 - def r{T,w & B{T}} = F{eltype{T}} & (elwidth{T}==w) - def r{T & ~isvec{T}} = 0 - r -} - # ceiling divide def cdiv{a,b} = (a+b-1)/b @@ -61,6 +52,34 @@ def anyInt{x} = 0 def anyInt{x & knum{x}} = (x>>0) == x def anyInt{x & isreg{x}|isconst{x}} = isint{x} +# vector width/type checks +def w128{T} = 0 +def w128{T & isvec{T}} = width{T}==128 +def w128{T,w} = 0 +def w128{T,w & w128{T}} = elwidth{T}==w +def w256{T} = 0 +def w256{T & isvec{T}} = width{T}==256 +def w256{T,w} = 0 +def w256{T,w & w256{T}} = elwidth{T}==w + +# width+type checks +def genchk{B, F} = { + def r{T} = 0 + def r{T & B{T}} = F{eltype{T}} + def r{T,w} = 0 + def r{T,w & B{T}} = F{eltype{T}} & (elwidth{T}==w) + def r{T & ~isvec{T}} = 0 + r +} +def w128i = genchk{w128, {T} => isint{T}} +def w128s = genchk{w128, {T} => issigned{T}} +def w128u = genchk{w128, {T} => isunsigned{T}} +def w128f = genchk{w128, {T} => isfloat{T}} +def w256i = genchk{w256, {T} => isint{T}} +def w256s = genchk{w256, {T} => issigned{T}} +def w256u = genchk{w256, {T} => isunsigned{T}} +def w256f = genchk{w256, {T} => isfloat{T}} + def trunc{T, x:U & isint{T} & isint{U} & T<=U} = emit{T, '', x} def trunc{T, x & knum{x}} = cast{T, x} diff --git a/src/singeli/src/sse3.singeli b/src/singeli/src/sse3.singeli index 744919ef..47a1401d 100644 --- a/src/singeli/src/sse3.singeli +++ b/src/singeli/src/sse3.singeli @@ -1,12 +1,3 @@ -def w128{T} = 0 -def w128{T & isvec{T}} = width{T}==128 -def w128{T,w} = 0 -def w128{T,w & w128{T}} = elwidth{T}==w -def w128i = genchk{w128, {T} => isint{T}} -def w128s = genchk{w128, {T} => issigned{T}} -def w128u = genchk{w128, {T} => isunsigned{T}} -def w128f = genchk{w128, {T} => isfloat{T}} - def v2i{x:T & w128{T}} = [16]u8 ~~ x # for compact casting for the annoying intrinsic type system def v2f{x:T & w128{T}} = [4]f32 ~~ x def v2d{x:T & w128{T}} = [2]f64 ~~ x