fix usz=64 build
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8321364afe
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@ -149,7 +149,7 @@ def do_bittab{x0:*void, n:u64, tab:*void, u:u8, t, mode, r0} = {
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btab:= *i8~~tab
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btab:= *i8~~tab
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def settab_sub{x, v, i} = {
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def settab_sub{x, v, i} = {
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if (rval) store{*u8~~r0, u, x}
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if (rval) store{*u8~~r0, u, x}
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if (rind and v!=t) store{r0, x, cast_i{u32, i}}
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if (rind and v!=t) store{r0, x, cast_i{usz, i}}
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u+= u8~~i8~~(t - v) # u tracks the total of btab
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u+= u8~~i8~~(t - v) # u tracks the total of btab
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store{btab, x, t}
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store{btab, x, t}
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v
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v
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