From f6c52ef3b39287019ce277cee1d1b0996ed0bd0a Mon Sep 17 00:00:00 2001 From: dzaima Date: Wed, 14 Aug 2024 02:16:17 +0300 Subject: [PATCH] disable Singeli bitwiden on SSE2 --- src/singeli/src/base.singeli | 1 + src/singeli/src/bits.singeli | 28 +++++++++++++++------------- src/singeli/src/lut.singeli | 2 -- src/utils/bits.c | 2 +- 4 files changed, 17 insertions(+), 16 deletions(-) diff --git a/src/singeli/src/base.singeli b/src/singeli/src/base.singeli index ace8e23e..720dc0db 100644 --- a/src/singeli/src/base.singeli +++ b/src/singeli/src/base.singeli @@ -167,6 +167,7 @@ def el_s{V=[_]T} = re_el{w_h{T}, V} # vector definitions def arch_defvw = if (hasarch{'AVX2'}) 256 else 128 def has_simd = hasarch{'X86_64'} or hasarch{'AARCH64'} +def has_sel = hasarch{'AVX2'} or hasarch{'AARCH64'} def fast_BMI2{} = hasarch{'BMI2'} and not SLOW_PDEP # test if vector has a specific width & element type diff --git a/src/singeli/src/bits.singeli b/src/singeli/src/bits.singeli index 93370b56..683e11ba 100644 --- a/src/singeli/src/bits.singeli +++ b/src/singeli/src/bits.singeli @@ -23,19 +23,21 @@ def table{w} = each{bitsel_i{w, .}, tup{u8, u16, u32, u64}} exportT{'simd_bitsel', table{arch_defvw}} -fn bitwiden_n_8(src:*void, dst:*void, csz:ux, cam:ux) : void = { - assert{cam>0} - assert{(csz>1) & (csz<8)} - def bulk = arch_defvw / 8 - def V = [bulk]u8 - bitalign{tup{2,8,csz}, 8, {s, align} => { - @maskedLoop{bulk}(dst in tup{V,*u8~~dst} over cam) { - dst = align{load{*V~~src}} - ptr_add{u8, src, bulk*s/8} - } - }} -} -export{'si_bitwiden_n_8', bitwiden_n_8} +(if (has_sel) { + fn bitwiden_n_8(src:*void, dst:*void, csz:ux, cam:ux) : void = { + assert{cam>0} + assert{(csz>1) & (csz<8)} + def bulk = arch_defvw / 8 + def V = [bulk]u8 + bitalign{tup{2,8,csz}, 8, {s, align} => { + @maskedLoop{bulk}(dst in tup{V,*u8~~dst} over cam) { + dst = align{load{*V~~src}} + ptr_add{u8, src, bulk*s/8} + } + }} + } + export{'si_bitwiden_n_8', bitwiden_n_8} +}) (if (hasarch{'AARCH64'}) { fn bitnarrow_8_n(src:*void, dst:*void, csz:ux, cam:ux) : void = { diff --git a/src/singeli/src/lut.singeli b/src/singeli/src/lut.singeli index c76aece4..c9e2cbde 100644 --- a/src/singeli/src/lut.singeli +++ b/src/singeli/src/lut.singeli @@ -3,8 +3,6 @@ def __shr{(u16)}{a:T, b} = T~~(re_el{u16,a}>>b) def broadcast{[(n*2)]E, x:[n]E} = pair{x, x} def pow2_up{v, least} = max{least, 1<