rearrange shrm/shlm args, slightly better NEON homMask{[16]u8}
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@ -47,10 +47,11 @@ def max{a:T,b:T & nvec{T}} = emit{T, ntyp{'vmax', T}, a, b}
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def __shl{a:T,b:S & nveci{T} & nveci{S,elwidth{T}}} = emit{T, ntyp{'vshl', T}, a, ty_s{b}}
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def addp{a:T,b:T & nvec{T}} = emit{T, ntyp{'vpadd', T}, a, b}
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def __shl{a:T, s & nveci{T} & knum{s} & s>0 & s<elwidth{T}} = emit{T, ntyp{'vshl', '_n', T}, a, s}; def __shl{a:T,s==0 & nveci{T}} = a
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def __shr{a:T, s & nveci{T} & knum{s} & s>0 & s<elwidth{T}} = emit{T, ntyp{'vshr', '_n', T}, a, s}; def __shr{a:T,s==0 & nveci{T}} = a
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def shrn{a:T, s & w128i{T} & elwidth{T}>8} = { def H=v_half{ty_half{T}}; emit{H, ntyp0{'vshrn_n', T}, a, s} } # a>>s, narrowed
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def shrm{a:T, d:T, s & w128u{T}} = emit{T, ntyp{'vsri', '_n', T}, a, d, s} # (a>>s) | (d & newZeroesIn(a>>s))
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def __shl{a:T, s & nveci{T} & knum{s} & s>0 & s<elwidth{T}} = emit{T, ntyp{'vshl', '_n', T}, a, s}; def __shl{a:T,s==0 & nveci{T}} = a
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def __shr{a:T, s & nveci{T} & knum{s} & s>0 & s<elwidth{T}} = emit{T, ntyp{'vshr', '_n', T}, a, s}; def __shr{a:T,s==0 & nveci{T}} = a
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def shrn{a:T, s & w128i{T} & elwidth{T}>8} = { def H=v_half{ty_half{T}}; emit{H, ntyp0{'vshrn_n', T}, a, s} } # a>>s, narrowed
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def shrm{a:T, s, d:T & nvecu{T}} = emit{T, ntyp{'vsri', '_n', T}, d, a, s} # (a>>s) | (d & (mask of new zeroes))
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def shlm{a:T, s, d:T & nvecu{T}} = emit{T, ntyp{'vsli', '_n', T}, d, a, s} # (a<<s) | (d & (mask of new zeroes))
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def bitBlend{f:T, t:T, m:M & nvec{T} & nvecu{M,elwidth{T}} & width{T}==width{M}} = emit{T, ntyp{'vbsl', T}, m, t, f}
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def homBlend{f:T, t:T, m:M & nvec{M}} = bitBlend{f, t, m}
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@ -66,6 +67,14 @@ def addpw { x:T & nveci{T} & elwidth{T}<=32 } = emit{ty_dbl{T}
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def addpwa{a:D, x:T & nveci{T} & elwidth{T}<=32 & D==ty_dbl{T}} = emit{D, ntyp{'vpadal', T}, a, x} # add pairwise widening + accumulate
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def mla{a:T, x:T, y:T & nvec{T}} = emit{T, ntyp{'vmla', T}, a, x, y} # a + x*y
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def mls{a:T, x:T, y:T & nvec{T}} = emit{T, ntyp{'vmls', T}, a, x, y} # a - x*y
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def rbit{x:T & nvecu{T,8}} = emit{T, ntyp{'vrbit', T}, x}
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def rev{w, x:T & w==elwidth{T}} = x
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def rev{w==16, x:T & elwidth{T}<16} = emit{T, ntyp{'vrev16', T}, x} # reverse the order of elements in each w-bit window
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def rev{w==32, x:T & elwidth{T}<32} = emit{T, ntyp{'vrev32', T}, x}
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def rev{w==64, x:T & elwidth{T}<64} = emit{T, ntyp{'vrev64', T}, x}
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def popc{x:T & nvecu{T,8}} = emit{T, ntyp{'vcnt', T}, x}
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def clz{x:T & nvecu{T} & elwidth{T}<=32} = emit{T, ntyp{'vclz', T}, x}
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def cls{x:T & nveci{T} & elwidth{T}<=32} = ty_u{T}~~emit{ty_s{T}, ntyp{'vcls', T}, x}
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def __eq{a:T,b:T & nvec{T}} = emit{ty_u{T}, ntyp{'vceq', T}, a, b}
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def __ge{a:T,b:T & nvec{T}} = emit{ty_u{T}, ntyp{'vcge', T}, a, b}
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@ -102,6 +111,7 @@ def loadLow{ptr:P, w & w==elwidth{P}} = load{ptr}
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def undefPromote{T, x:X & w64{X} & w128{T} & eltype{T}==eltype{X}} = emit{T, ntyp{'vcombine', X}, x, x} # arm_neon.h doesn't actually provide a way to do this in a 0-instruction way. ¯\_(ツ)_/¯
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def half{x:T, n==0 & w128{T}} = emit{v_half{T}, ntyp0{'vget_low', T}, x}
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def half{x:T, n==1 & w128{T}} = emit{v_half{T}, ntyp0{'vget_high', T}, x}
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def pair{a:T, b:T & w64{T}} = emit{v_dbl{T}, ntyp0{'vcombine', T}, a, b}
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def extract{x:T,n & nvec{T} & knum{n}} = emit{eltype{T}, ntyp{'vget', '_lane', T}, x, n}
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def copyLane{dst:D, di, src:S, si & w64{D} & nvec{S} & eltype{D}==eltype{S}} = emit{D, ntyp{'vcopy_lane', S}, dst, di, src, si}
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def copyLane{dst:D, di, src:S, si & w128{D} & nvec{S} & eltype{D}==eltype{S}} = emit{D, ntyp{'vcopyq_lane', S}, dst, di, src, si}
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@ -167,7 +177,8 @@ def homMask{x:T & nvecu{T} & elwidth{T}>=vcount{T}} = {
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truncBits{vcount{T}, fold_add{x & make{T, 1<<iota{vcount{T}}}}}
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}
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def homMask{x:T & nvecu{T} & T==[16]u8} = {
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fold_add{addpw{x & make{[16]u8, 1<<(iota{16}&7)}} << make{[8]u16, merge{4**0, 4**8}}}
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t:= [8]u16~~sel{[16]u8, x, make{[16]u8, 0,8,1,9,2,10,3,11,4,12,5,13,6,14,7,15}}
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fold_add{t & make{[8]u16, (1<<iota{8})*0x0101}}
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}
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def homMask{a:T,b:T & T==[16]u8} = {
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m:= make{[16]u8, 1<<(iota{16}&7)}
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@ -183,7 +194,7 @@ def homMask{a:T,b:T,c:T,d:T & T==[16]u8} = {
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def homMask{...as & tuplen{as}>1 & elwidth{type{tupsel{0,as}}}>=32} = homMask{...each{{i}=>narrowPair{tupsel{i*2,as},tupsel{i*2+1,as}}, iota{tuplen{as}/2}}}
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def homMask{a:T,b:T & vcount{T}*2<=elwidth{T}} = {
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def n = vcount{T}
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truncBits{n*2, fold_add{shrm{b,a,elwidth{T}-n} & make{T, (1<<iota{n}) | (1<<(iota{n}+n))}}}
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truncBits{n*2, fold_add{shrm{a,elwidth{T}-n,b} & make{T, (1<<iota{n}) | (1<<(iota{n}+n))}}}
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}
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def andAllZero{x:T, y:T & nveci{T}} = ~bitAny{x&y}
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