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4 Commits

Author SHA1 Message Date
Quentin Carbonneaux
6abea36b9b nits 2026-04-28 16:48:43 +02:00
Quentin Carbonneaux
b8b95a99df asserts in emitcon() 2026-04-28 16:23:47 +02:00
Quentin Carbonneaux
a9796317aa apple tls is global 2026-04-28 16:11:47 +02:00
Quentin Carbonneaux
5ac78c67c9 nits 2026-04-28 16:01:48 +02:00
5 changed files with 29 additions and 33 deletions

View File

@ -195,13 +195,13 @@ emitcon(Con *con, E *e)
case CAddr:
l = str(con->sym.id);
p = l[0] == '"' ? "" : T.assym;
if (con->sym.type & SThr) {
if (T.apple)
fprintf(e->f, "%s%s@TLVP", p, l);
else
fprintf(e->f, "%%fs:%s%s@tpoff", p, l);
} else
if (con->sym.type == SThr) {
assert(!T.apple);
fprintf(e->f, "%%fs:%s%s@tpoff", p, l);
} else {
assert(con->sym.type == SGlo);
fprintf(e->f, "%s%s", p, l);
}
if (con->bits.i)
fprintf(e->f, "%+"PRId64, con->bits.i);
break;
@ -380,7 +380,7 @@ Next:
off = e->fn->con[ref.val];
emitcon(&off, e);
if (off.type == CAddr)
if (off.sym.type != SThr || T.apple)
if (off.sym.type != SThr)
fprintf(e->f, "(%%rip)");
break;
case RTmp:
@ -532,14 +532,21 @@ emitins(Ins i, E *e)
emitf("mov%k %0, %=", &i, e);
break;
case Oaddr:
if (!T.apple
&& rtype(i.arg[0]) == RCon
&& e->fn->con[i.arg[0].val].sym.type == SThr) {
if (rtype(i.arg[0]) != RCon)
goto Table;
assert(isreg(i.to));
con = &e->fn->con[i.arg[0].val];
sym = str(con->sym.id);
if (T.apple && (con->sym.type & SThr)) {
fprintf(e->f,
"\tmovq %s%s@TLVP(%%rip), %%%s\n",
sym[0] == '"' ? "" : T.assym, sym,
regtoa(i.to.val, SLong));
break;
}
if (!T.apple && con->sym.type == SThr) {
/* derive the symbol address from the TCB
* address at offset 0 of %fs */
assert(isreg(i.to));
con = &e->fn->con[i.arg[0].val];
sym = str(con->sym.id);
emitf("movq %%fs:0, %L=", &i, e);
fprintf(e->f, "\tleaq %s%s@tpoff",
sym[0] == '"' ? "" : T.assym, sym);
@ -551,14 +558,9 @@ emitins(Ins i, E *e)
regtoa(i.to.val, SLong));
break;
}
if (!T.apple
&& rtype(i.arg[0]) == RCon
&& e->fn->con[i.arg[0].val].sym.type == SExtThr) {
if (!T.apple && con->sym.type == SExtThr) {
/* initial-exec TLS: load offset from
* GOT, add to thread-base register */
assert(isreg(i.to));
con = &e->fn->con[i.arg[0].val];
sym = str(con->sym.id);
assert(!con->bits.i);
emitf("movq %%fs:0, %L=", &i, e);
fprintf(e->f,
@ -567,12 +569,8 @@ emitins(Ins i, E *e)
regtoa(i.to.val, SLong));
break;
}
if (rtype(i.arg[0]) == RCon
&& e->fn->con[i.arg[0].val].sym.type == SExt) {
if (con->sym.type == SExt) {
/* load address from the GOT */
assert(isreg(i.to));
con = &e->fn->con[i.arg[0].val];
sym = str(con->sym.id);
assert(!con->bits.i);
fprintf(e->f,
"\tmovq %s%s@gotpcrel(%%rip), %%%s\n",

View File

@ -143,10 +143,7 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
cc = *c;
cc.bits.i = 0;
r3 = newcon(&cc, fn);
if (T.apple && (c->sym.type & SThr))
emit(Oload, Kl, r2, r3, R);
else
emit(Oaddr, Kl, r2, r3, R);
emit(Oaddr, Kl, r2, r3, R);
if (rtype(r0) == RMem) {
m = &fn->mem[r0.val];
m->offset.type = CUndef;

View File

@ -278,6 +278,10 @@ loadaddr(Con *c, char *rn, E *e)
s = "\tadrp\tR, SO\n"
"\tadd\tR, R, #:lo12:SO\n";
break;
case SExtThr:
if (!T.apple)
die("extern thread unavailable on arm64");
/* fall through */
case SThr:
if (T.apple)
s = "\tadrp\tR, S@tlvppage\n"
@ -295,9 +299,6 @@ loadaddr(Con *c, char *rn, E *e)
s = "\tadrp\tR, :got:SO\n"
"\tldr\tR, [R, #:got_lo12:SO]\n";
break;
case SExtThr:
die("extern thread not yet implemented on arm64");
break;
}
l = str(c->sym.id);

View File

@ -80,7 +80,7 @@ fixarg(Ref *pr, int k, int phi, Fn *fn)
c = &fn->con[r0.val];
if (T.apple
&& c->type == CAddr
&& c->sym.type == SThr) {
&& (c->sym.type & SThr)) {
r1 = newtmp("isel", Kl, fn);
*pr = r1;
if (c->bits.i) {

View File

@ -250,7 +250,7 @@ loadaddr(Con *c, char *rn, FILE *f)
fputc('\n', f);
break;
case SExtThr:
die("extern thread not yet implemented on rv64");
die("extern thread unavailable on rv64");
break;
default:
fprintf(f, "\tla %s, ", rn);